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參數(shù)資料
| 型號(hào)： | ICS8431AM-21LFT |
| 英文描述： | 350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| 中文描述： | 350MHz頻段，低抖動(dòng)，晶體振蕩器到3.3的LVPECL頻率合成器 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 2083K |
| 代理商： | ICS8431AM-21LFT |
ICS8431CM-01
www.icst.com/products/hiperclocks.html
REV. A JUNE 5, 2001
9
ICS8431-01
200MH
Z
, L
OW
J
ITTER
,
LVPECL F
REQUENCY
S
YNTHESIZER
F
IGURE
6B. PCB B
OARD
L
AYOUT
F
OR
ICS8431-01
C4
ICS8431-01
VIA
X1
R1
TL2 (50 Ohm)
Close to the input
pins of the
receiver
IN+
Signals
R5
GND
R4
IN-
TL1 (50 Ohm)
VDD
R2
C2
U1
C3
R3
C6
C1
The following component footprints are used in this layout
example:
All the resistors and capacitors are size 0603.
The Crystal X1 is Raltron Part # AS-16.666-18-SMD.
P
OWER
AND
G
ROUNDING
Place the decoupling capacitors C1, C2 and C3, C4, C5, C6 as
close as possible to the power pins. If space allows, placing the
decoupling capacitor at the component side is preferred. This can
reduce unwanted inductance between the decoupling capacitor
and the power pin generated by the via.
Maximize the pad size of the power (ground) at the decoupling
capacitor. Maximize the number of vias between power (ground)
and the pads. This can reduce the inductance between the power
(ground) plane and the component power (ground) pins.
If VDDA shares the same power supply with VDD, insert the RC
filter R5, C3, and C4 in between. Place this RC filter as close to
the VDDA as possible.
C
LOCK
T
RACES
AND
T
ERMINATION
The component placements, locations and orientations should
be arranged to achieve the best clock signal quality. Poor clock
signal quality can degrade the system performance or cause
system failure. In the synchronous high-speed digital system,
the clock signal is less tolerable to poor signal quality than other
signals. Any ringing on the rising or falling edge or excessive ring
back can cause system failure. The trace shape and the trace
delay might be restricted by the available space on the board and
the component location. While routing the traces, the clock signal
traces should be routed first and should be locked prior to routing
other signals traces.
The traces with 50
transmission lines TL1 and TL2 at
FOUT and nFOUT should have equal delay and run ad-
jacent to each other. Avoid sharp angles on the clock trace.
Sharp angle turns cause the characteristic impedance to
change on the transmission lines.
Keep the clock trace on same layer. Whenever possible,
avoid any vias on the clock traces. Any via on the trace
can affect the trace characteristic impedance and hence
degrade signal quality.
To prevent cross talk, avoid routing other signal traces in
parallel with the clock traces. If running parallel traces is
unavoidable, allow more space between the clock trace
and the other signal trace.
Make sure no other signal trace is routed between the
clock trace pair.
The matching termination resistors R1, R2, R3 and R4 should be
located as close to the receiver input pins as possible. Other termi-
nation scheme can also be used but is not shown in this example.
C
RYSTAL
The crystal X1 should be located as close as possible to the pins
26 (XTAL1) and 25 (XTAL2). The trace length between the X1
and U1 should be kept to a minimum to avoid unwanted parasitic
inductance and capacitance. Other signal traces should not be
routed near the crystal traces.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8431AM-21T | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431AMI-21 | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431AMI-21LF | 功能描述:IC SYNTHESIZER 350MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ICS8431AMI-21LFT | 功能描述:IC SYNTHESIZER 350MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8431AMI-21T | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
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