參數(shù)資料
型號(hào): ICS843001I-23
英文描述: FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER
中文描述: FEMTOCLOCKS⑩晶體至3.3的LVPECL /的LVCMOS頻率合成器
文件頁數(shù): 10/15頁
文件大小: 194K
代理商: ICS843001I-23
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
10
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
A
PPLICATION
I
NFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843001I-23 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
, V
, and V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1
illustrates how
a 10
Ω
resistor along with a 10μF and a .01
μ
F bypass
capacitor should be connected to each V
CCA
.
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
F
IGURE
1. P
OWER
S
UPPLY
F
ILTERING
10
Ω
V
CCA
10
μ
F
.01
μ
F
3.3V or 2.5V
.01
μ
F
V
CC
I
NPUTS
:
C
RYSTAL
I
NPUT
:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1k
Ω
resistor can be tied from XTAL_IN to ground.
CLK I
NPUT
:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1k
Ω
resistor can be tied from the CLK input to
ground.
C
ONTROL
P
INS
:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω
resistor can be used.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
LVPECL O
UTPUT
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
相關(guān)PDF資料
PDF描述
ICS843001AGI-23 FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER
ICS843001AGI-23LF FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER
ICS843001AGI-23LFT FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER
ICS843001AGI-23T FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER
ICS843001BGI FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
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