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參數(shù)資料
| 型號： | ICS8427DY-02LFT |
| 英文描述： | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| 中文描述： | 500MHz的低抖動的LVCMOS /水晶到LVHSTL頻率合成器 |
| 文件頁數(shù)： | 13/21頁 |
| 文件大?。?/td> | 258K |
| 代理商： | ICS8427DY-02LFT |
8427DY-02
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 17, 2006
13
Integrated
Circuit
Systems, Inc.
ICS8427-02
500MH
Z
, L
OW
J
ITTER
LVCMOS/C
RYSTAL
-
TO
-LVHSTL F
REQUENCY
S
YNTHESIZER
Spread-spectrum clocking is a frequency modulation tech-
nique for EMI reduction. When spread-spectrum is enabled, a
32.55kHz triangle waveform is used with 0.5% down-spread
(+0.0% / -0.5%) from the nominal 200MHz clock frequency.
An example of a triangle frequency modulation profile is shown
in
Figure 5A
below. The ramp profile can be expressed as:
Fnom = Nominal Clock Frequency in Spread OFF mode
(200MHz with 16.6667MHz IN)
Fm = Nominal Modulation Frequency
= Reference Frequency
16 x 32
δ
= Modulation Factor (0.5% down spread)
(1 -
δ
) fnom + 2 fm x
δ
x fnom x t when 0 < t <
,
(1 -
δ
) fnom - 2 fm x
δ
x fnom x t when
< t <
1
2 fm
1
2 fm
1
fm
The ICS8427-02 triangle modulation frequency deviation will
not exceed 0.6% down-spread from the nominal clock fre-
quency (+0.0% / -0.5%). An example of the amount of down
spread relative to the nominal clock frequency can be seen in
the frequency domain, as shown in
Figure 5B.
The ratio of this
width to the fundamental frequency is typically 0.4%, and will
not exceed 0.6%. The resulting spectral reduction will be
greater than 7dB, as shown in Figure 5B. It is important to
note the ICS8427-02 7dB minimum spectral reduction is the
component-specific EMI reduction, and will not necessarily
be the same as the system EMI reduction.
F
IGURE
5B. 200MH
Z
C
LOCK
O
UTPUT
IN
F
REQUENCY
D
OMAIN
(A) S
PREAD
-S
PECTRUM
OFF
(B) S
PREAD
-S
PECTRUM
ON
F
IGURE
5A. T
RIANGLE
F
REQUENCY
M
ODULATION
S
PREAD
S
PECTRUM
Fnom
(1 -
δ
) Fnom
0.5/fm
1/fm
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8427-02 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
, V
, and V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 4
illustrates how
a 10
Ω
resistor along with a 10
μ
F and a .01
μ
F bypass
capacitor should be connected to each V
DDA
pin.
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
F
IGURE
4. P
OWER
S
UPPLY
F
ILTERING
10
Ω
V
DDA
10
μ
F
.01
μ
F
2.5V
.01
μ
F
V
DD
B
A
Δ
10 dBm
δ
= 0.3%
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| ICS8430002AYILF | 功能描述:IC FREQ SYNTHESIZER 48LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ICS8430002AYILFT | 功能描述:IC FREQ SYNTHESIZER 48LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
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