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參數(shù)資料
| 型號： | ICS8427DK-02 |
| 英文描述： | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| 中文描述： | 500MHz的低抖動的LVCMOS /水晶到LVHSTL頻率合成器 |
| 文件頁數(shù)： | 15/21頁 |
| 文件大?。?/td> | 258K |
| 代理商： | ICS8427DK-02 |
8427DY-02
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 17, 2006
15
Integrated
Circuit
Systems, Inc.
ICS8427-02
500MH
Z
, L
OW
J
ITTER
LVCMOS/C
RYSTAL
-
TO
-LVHSTL F
REQUENCY
S
YNTHESIZER
P
OWER
C
ONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS8427-02.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8427-02 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 2.5V + 5% = 2.625V, which gives worst case results.
NOTE:
Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 2.625V * 175mA =
459.4mW
Power (outputs)
MAX
=
32.6mW/Loaded Output pair
If all outputs are loaded, the total power is 6 * 32.6mW =
195.6mW
Total Power
_MAX
(3.465V, with all outputs switching) =
459.37mW + 195.6mW =
655mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 8A below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.655W * 42.1°C/W = 97.6°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
67.8°C/W
47.9°C/W
55.9°C/W
42.1°C/W
50.1°C/W
39.4°C/W
T
ABLE
8A. T
HERMAL
R
ESISTANCE
θ
JA
FOR
32-P
IN
LQFP, F
ORCED
C
ONVECTION
T
ABLE
8B.
θ
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
A
32 L
EAD
VFQFN
θ
JA
by Velocity (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
34.8°C/W
相關(guān)PDF資料 |
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| ICS8427DK-02LF | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
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| ICS8427DK-02T | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DY-02 | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DY02L | 500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8427DK-02LF | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DK-02LFT | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DK-02T | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DY-02 | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
| ICS8427DY02L | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, LOW JITTER LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER |
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