IDT / ICS HCSL CLOCK GENERATOR 12 " />
參數(shù)資料
型號: ICS841654AGILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 4/17頁
文件大小: 0K
描述: IC CLOCK GENERATOR 28-TSSOP
標(biāo)準(zhǔn)包裝: 48
系列: HiPerClockS™, FemtoClock™
類型: 時鐘發(fā)生器,扇出配送,多路復(fù)用器
PLL: 帶旁路
輸入: LVCMOS,LVTTL,晶體
輸出: HCSL,LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 無/是
頻率 - 最大: 125MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
其它名稱: 841654AGILF
IDT / ICS HCSL CLOCK GENERATOR
12
ICS841654AGI REV. A APRIL 17, 2008
ICS841654I
FEMTOCLOCKS CRYSTAL-TO-HCSL CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS841654I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS841654I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.465V * 85mA = 294.5mW
Power (outputs)
MAX
= 50.06mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 50.06mW = 200.24mW
Total Power
_MAX
(3.465V, with all outputs switching) = 294.5mW + 200.24mW = 494.74mW
2.
Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 64.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.495W * 64.5°C/W = 116.9°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 7. THERMAL RESISTANCE
θθθθθ
JA
FOR
28-LEAD TSSOP, FORCED CONVECTION
θθθθθ
JA
by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
64.5°C/W
60.4°C/W
58.5°C/W
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