參數(shù)資料
型號: ICS840001I
英文描述: FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
中文描述: FEMTOCLOCKS⑩晶體到的LVCMOS / LVTTL頻率合成器
文件頁數(shù): 8/11頁
文件大?。?/td> 175K
代理商: ICS840001I
840001AGI
www.icst.com/products/hiperclocks.html
REV. A JUNE 20, 2005
8
Integrated
Circuit
Systems, Inc.
ICS840001I
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-
LVCMOS/LVTTL C
LOCK
G
ENERATOR
PRELIMINARY
L
AYOUT
G
UIDELINE
Figure 3Ashows a schematic example of the ICS840001I. An
example of LVCMOS termination is shown in this schematic.
Additional LVCMOS termination approaches are shown in the
LVCMOS Termination Application Note. In this example, an 18
pF parallel resonant 26.5625MHz crystal is used. The C1=27pF
and C2=33pF are recommended for frequency accuracy. For
F
IGURE
3A. ICS840001I S
CHEMATIC
E
XAMPLE
different board layout, the C1 and C2 may be slightly adjusted
for optimizing frequency accuracy. The output frequency can be
set at either 106.25MHz or 212.5MHz. Leaving the R1 un-in-
stalled (or install 1k
Ω
pull-down) will set the output frequency at
106.25MHz. Installing the R1 pull up will set the output frequency
at 212.5MHz.
PC B
OARD
L
AYOUT
E
XAMPLE
Figure 3Bshows an example of P.C. board layout. The crystal
X1 footprint in this example allows either surface mount (HC49S)
or through hole (HC49) package. C3 is 0805. C1 and C2 are
0402. Other resistors and capacitors are 0603. This layout as-
sumes that the board has clean analog power and ground planes.
F
IGURE
3B. ICS840001I PC B
OARD
L
AYOUT
E
XAMPLE
LVCMOS
VDD=3.3V
U2
840001I
1
2
3
4
8
7
6
5
VDDA
OE
XTAL_OUT
XTAL_IN
VDD
Q
GND
FREQ_SEL
C5
0.1u
R1
1K
R2
10
C3
10uF
VDD
VDD
C2
33pF
FRE_SEL
VDD
Q
C4
0.1u
Zo = 50 Ohm
OE
R3
43
VDDA
C1
27pF
X1
相關(guān)PDF資料
PDF描述
ICS840001 Hex inverters 14-PDIP 0 to 70
ICS840001BG Hex inverters 14-SO 0 to 70
ICS840001BGT FEMTOCLOCKS⑩ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
ICS840002-01 FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
ICS840002AG-01 FEMTOCLOCKS⑩ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
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