參數(shù)資料
型號: ICS839893AYI
英文描述: LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER
中文描述: 低偏移,1對13的LVCMOS / LVTTL緩沖區(qū)分壓器
文件頁數(shù): 7/10頁
文件大小: 127K
代理商: ICS839893AYI
Integrated
Circuit
Systems, Inc.
839893AYI
www.icst.com/products/hiperclocks.html
REV. A AUGUST 8, 2005
7
ICS839893I
L
OW
S
KEW
, 1-
TO
-13
LVCMOS/LVTTL B
UFFER
D
IVIDER
O
UTPUT
E
NABLE
/D
ISABLE
T
IME
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDOX
2
x 100%
t
PW
QA0:5,
QB0:5, QC
SCOPE
Qx
LVCMOS
SCOPE
Qx
LVCMOS
P
ARAMETER
M
EASUREMENT
I
NFORMATION
O
UTPUT
S
KEW
2.5V C
ORE
/2.5V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
-1.25V±5%
V
DD,
V
DDO_A,
V
DDO_B,
V
DDO_C
1.25V±5%
3.3V C
ORE
/3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
1.65V±5%
-1.65V±5%
P
ROPAGATION
D
ELAY
O
UTPUT
R
ISE
/F
ALL
T
IME
t
sk(o)
V
DDOX
2
V
DDOX
2
Qx
Qy
GND
GND
V
DD,
V
DDO_A,
V
DDO_B,
V
DDO_C
t
PD
V
DD
2
V
DDOX
2
QA0:QA5,
QB0:QB5,
QC
CLK0,
CLK1
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
1.25V
1.25V
1.25V
V
OH
- 0.15V
V
OL
V
OH
V
OL
0V
2.5V
t
PHZ
t
PZH
Output nDPx
(See Note)
Sn
(Low-level
enabling)
NOTE: The output is high except when disabled by the Sn control.
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
B
ANK
S
KEW
(
where X denotes outputs in the same bank
)
t
sk(b)
V
DDOX
V
DDOX
QX0:QX5
QX0:QX5
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