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參數(shù)資料
| 型號(hào)： | ICS82C404 |
| 英文描述： | Dual Programmable Graphics Frequency Generator |
| 中文描述： | 雙頻率可編程圖形發(fā)生器 |
| 文件頁(yè)數(shù)： | 7/13頁(yè) |
| 文件大小： | 610K |
| 代理商： | ICS82C404 |
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Power Management Issues
Power-down mode 1
The
ICS82C404
contains a mechanism to reduce the quiescent
power when stand-by operation is desired. Power-down mode
1 is invoked by pulling PD low and having the proper CNTL
register bit set to zero. In this mode, VCOs are shut down, the
VCLK output is forced high, and the MCLK output is set to a
user-defined low frequency value to refresh dynamic RAM.
The power-down MCLK value is determined by the following
equation:
MCLK
PD
=F
REF
/(PWRDWN register divisor value)
The power-down register divisor is determined according to
the 4-bit word programmed into the PWRDWN register (see
table below).
Power-down Mode 2
When there is no need for any output during power-down, an
alternate mode is available which will completely shut down
all outputs and the reference oscillator, but still preserves all
register contents. Power-down mode 2 is invoked by the first
programming the power-down bit in the CNTL register and
then pulling the PD pin low.
The PD pin
The PD pin has a standard internal pull-up resistor during
normal operation. When the chip goes into power-down mode
1 or 2, the normal pull-up resistor is dynamically switched to
a weak pull-up, which reduces power consumption. If the PD
pin is allowed to float after it has been pulled down, the weak
pull-up will bring the signal high and allow the device to
resume operation.
Power-Down Register Table
PWRDWN bits
P2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
PWRDWN
Register Value
Power-down
Divisor
MCLK
PD
(f
REF
=14.31818)
P3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
P1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
P0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
8 (default)
9
A
B
C
D
E
F
n/a
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
n/a
447.4 kHz
477.3 kHz
511.4 kHz
550.7 kHz
596.6 kHz
650.8 kHz
715.9 kHz
795.5 kHz
894.9 kHz
1.02 MHz
1.19 MHz
1.43 MHz
1.79 MHz
2.39 MHz
3.58 MHz
ICS82C404
7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS82C404M | Dual Programmable Graphics Frequency Generator |
| ICS82C404N | Dual Programmable Graphics Frequency Generator |
| ICS82C404XXCN16 | Peripheral IC |
| ICS82C404XXCW16 | Peripheral IC |
| ICS8302-01 | LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS82C404M | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Dual Programmable Graphics Frequency Generator |
| ICS82C404N | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Dual Programmable Graphics Frequency Generator |
| ICS82C404XXCN16 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Peripheral IC |
| ICS82C404XXCW16 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Peripheral IC |
| ICS830154AGI-08LF | 制造商:Integrated Device Technology Inc 功能描述:IC FANOUT BUFFER 1.5V 1:4 8TSSOP 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER 1:4 160MHZ 8TSSOP |
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