參數(shù)資料
型號(hào): ICS81006I
廠商: Integrated Device Technology, Inc.
英文描述: VCXO-TO-LVCMOS OUTPUTS
中文描述: 壓控到LVCMOS輸出
文件頁(yè)數(shù): 10/14頁(yè)
文件大小: 656K
代理商: ICS81006I
IDT
/ ICS
VCXO-TO-LVCMOS OUTPUTS
10
ICS81006AKI REV A OCTOBER 2, 2006
ICS81006I
VCXO-TO-6 LVCMOS OUTPUTS
S
CHEMATIC
E
XAMPLE
Figure 2 shows an example of ICS81006I application schematic.
The decoupling capacitors should be located as close as
possible to the power pin. For the LVCMOS 20
output drivers,
series termination example is shown in the schematic. Additional
termination approaches are shown in the LVCMOS Termination
Application Note.
F
IGURE
2. ICS81006I S
CHEMATIC
E
XAMPLE
I
NPUTS
:
C
ONTROL
P
INS
:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
resistor can be used. The VC pin can not be
floated.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
C2
SPARE
R5
1K
VC = 0V to VDD
VDD
C1
SPARE
U1
81006
2
3
4
5
6
7
8
9
11
12
13
14
1
1
1
2
1
1
15
1
VDD
VC
DIV_SEL_Q5
O
G
Q
V
GND
Q3
VDDO
V
Q
G
O
Q
Q
GQ2
XTAL_OUT
Zo = 50
(U1-13)
C3
0.1uF
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
C6
0.1uF
C5
0.1uF
C7
10uf
Pull-up
example
(U1-9)
R4
1K
Quartz crystal should be
placed as close to the
device as possible.
VDDO
Pull-down
example
VDD
R3
1K
VDDO
R1
30
VDD
R2
30
VC
C4
0.1uF
XTAL
(U1-17)
Zo = 50
VDD
(U1-3)
81006I
相關(guān)PDF資料
PDF描述
ICS83023AMILF DUAL, 1-TO-1 DIFFERENTIAL-TOLVCMOS TRANSLATOR/BUFFER
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