參數(shù)資料
型號(hào): ICS726ATLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 2/7頁
文件大?。?/td> 0K
描述: IC VCXO 3.3V 12-36MHZ 6-TSOT
標(biāo)準(zhǔn)包裝: 2,500
類型: 壓控晶體振蕩器(VCXO)
PLL:
輸入: 晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 無/無
頻率 - 最大: 36MHz
除法器/乘法器: 無/無
電源電壓: 3.15 V ~ 3.45 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6 細(xì)型,TSOT-23-6
供應(yīng)商設(shè)備封裝: TSOT-23-6
包裝: 帶卷 (TR)
其它名稱: 726ATLFT
ICS726A
12 TO 36 MHZ 6TSOT VCXO
VCXO
IDT 12 TO 36 MHZ 6TSOT VCXO
2
ICS726A
REV E 021312
Pin Assignment
Pin Descriptions
External Component Selection
The ICS726A requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD (pin 4) and GND (pin 2), as close to these
pins as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
Series Termination Resistor
When the PCB trace between the clock output (CLK, pin 3)
and the load is over 1 inch, series termination should be
used. To series terminate a 50
Ω trace (a commonly used
trace impedance) place a 33
Ω resistor in series with the
clock line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20
Ω.
Quartz Crystal
The ICS726A VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section shown must be
followed.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
ICS726A incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the ICS726A is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 8.9 pF.
Required Crystal Parameters:
Nominal Frequency
as required MHz
Initial Accuracy at 25
° C
-20 min/+20 max ppm
Temperature Stability
-30 min/+30 max ppm
Aging, 1st year
-5 min/+5 max ppm
Aging, 10 years
-20 min/+20 max ppm
Operating Temp. Range, °C
0 min/+25 typ/+70 max
or
Operating Temp. Range, °C
-40 min/+25 typ/+85 max
Load Capacitance
8.6 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
270 Max
Equivalent Series Resistance
35
Ω Max
X2
GN D
CL K
VI N
VD D
X1
1
2
3
6
5
4
TSOT - 2 3 - 6
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X2
Input
Crystal connection. Connect to the external pullable crystal.
2
GND
Power
Connect to ground.
3
CLK
Output
VCXO CMOS level clock output at the frequency of the crystal.
4
VDD
Power
Connect to +3.3 V (0.01f decoupling capacitor recommended).
5
VIN
Input
Voltage input to VCXO — 0 to 3.3 V analog input which controls the
oscillation frequency of the VCXO.
6
XI
Input
Crystal connection. Connect to the external pullable crystal.
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