參數(shù)資料
型號: ICS721MT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 28 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁數(shù): 3/7頁
文件大小: 162K
代理商: ICS721MT
ICS721
LOW COST 27 MHZ 3.3 VOLT VCXO
VCXO
IDT / ICS LOW COST 27 MHZ 3.3 VOLT VCXO
3
ICS721
REV B 111706
External Component Selection
The ICS721 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0.01
F should be connected
between VDD and GND on pins 2 and 4 as close to the
ICS721 as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
Series Termination Resistor
When the PCB trace between the clock output and the load
is over 1 inch, series termination should be used. To series
terminate a 50
trace (a commonly used trace impedance),
place a 33
resistor in series with the clock line, as close to
the clock output pin as possible. The nominal impedance of
the clock output is 20
.
Quartz Crystal
The ICS721 VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section shown must be
followed.
Recommended Crystal Parameters:
Initial Accuracy at 25°C
±20 ppm
Temperature Stability
±30 ppm
Aging
±20 ppm
Load Capacitance
14 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
250 Max
Equivalent Series Resistance
35
Max
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the ICS721. There should be no via’s between the crystal
pins and the X1 and X2 device pins. There should be no
signal traces underneath or close to the crystal. See
application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
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