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| 型號： | ICS671M-03IT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 671 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 196K |
| 代理商： | ICS671M-03IT |
ICS671-03
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
ZDB AND MULTIPLIER
IDT 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
6
ICS671-03
REV B 112706
AC Electrical Characteristics
CycleUnless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70
° C
Note 1: With CLKIN = 100 MHz, FBIN to CLKA4, all outputs at 100 MHz.
Note 2: With VDD at a steady state, and valid clocks at CLKIN and FBIN.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
fIN
See table on page 2
10
133
MHz
Output Clock Frequency
See table on page 2
10
133
MHz
Output Rise Time
tR
20% to 80%, CL=30 pF
1.5
ns
Output Fall Time
tF
80% to 20%, CL=30 pF
1.25
ns
Output Clock Duty Cycle
At VDD/2
45
50
55
%
Device to Device Skew, equally loaded
Rising edges at VDD/2
700
ps
Output to Output Skew, equally loaded
Rising edges at VDD/2
200
ps
Input to Output Skew, FBIN to CLKA4,
S1=1, S0=1
Rising edges at VDD/2,
Note 1
±250
ps
Maximum Absolute Jitter
130
ps
Cycle to Cycle Jitter, 30 pF loads
300
ps
PLL Lock Time
Note 2
1.0
ms
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Thermal Resistance Junction to
Ambient
θ
JA
Still air
120
°C/W
θ
JA
1 m/s air flow
115
°C/W
θ
JA
3 m/s air flow
105
°C/W
Thermal Resistance Junction to Case
θ
JC
58
°C/W
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