參數(shù)資料
型號: ICS650-07B
英文描述: Broadcom Clock Source
中文描述: Broadcom的時鐘源
文件頁數(shù): 2/4頁
文件大小: 46K
代理商: ICS650-07B
ICS650-07B
Broadcom Clock Source
MD S 650-07B A
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126(408)295-9800tel www.icst.com
2
Revision 042600
Printed 11/15/00
Pin Descriptions
Key: XI, XO = crystal connections; I = Input; O = Output; P = power supply connection
Pin Assignment
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
PS
X2
X1/ICLK
VDD
DC
GND
125M
125M
DC
133M
GND
DC
DC
GND
OE
VDD
PCICLK
25M
VDD
VDD
Type
I
XO
XI
P
-
P
O
O
-
O
P
-
-
P
I
P
O
O
P
P
Description
PCI Clock frequency select input. Determines PCI CLK output per table above.
Crystal connection. Connect to 25 MHz crystal or leave unconnected for a clock input.
Crystal connection. Connect to 25 MHz fundamental crystal or clock input.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Don't Connect. Do not connect anything to this pin.
Connect to ground.
125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.
125.0 MHz clock output. Cannot be used for Gigabit Ethernet SERDES.
Don't Connect. Do not connect anything to this pin.
133.33 MHz clock output.
Connect to ground.
Don't Connect. Do not connect anything to this pin.
Don't Connect. Do not connect anything to this pin.
Connect to ground.
Output Enable. Tri-states all outputs when low. Internal pull-up.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
PCI Clock output per table above.
25.0 MHz buffered reference clock output.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
Connect to +3.3 V or +5 V. Must be same as other VDDs.
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
VDD
D C
D C
X2
VDD
OE
20 pin (150 mil) SSOP
10
133M
VDD
25M
PCICLK
X1/ICLK
PS
VDD
D C
GND
125M
125M
18
17
19
20
GND
D C
GND
PS
Pin 1
0
1
PCICLK
Pin 17
33.33 MHz
66.66 MHz
PCI CLK Output Select Table
0 = connect directly to GND
1 = connect directly to VDD
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PDF描述
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