參數(shù)資料
型號(hào): ICS525R-04LFT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/8頁(yè)
文件大小: 0K
描述: IC PECL CLK USER CONFIG 28-SSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: OSCaR™
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,晶體
輸出: PECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 200MHz
除法器/乘法器: 是/是
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 28-QSOP
包裝: 帶卷 (TR)
其它名稱: 525R-04LFT
DATASHEET
OSCAR USER CONFIGURABLE PECL CLOCK
ICS525-04
IDT / ICS OSCAR USER CONFIGURABLE PECL CLOCK
1
ICS525-04
REV E 051310
Description
The ICS525-04 OSCaRTM is the most flexible way to
generate a high quality, high frequency differential PECL
clock output from a crystal or CMOS clock input. The name
OSCaRTM stands for Oscillator Replacement, as it is
designed to replace crystal oscillators in almost any
electronic system. Users can easily configure the device to
produce nearly any output frequency from any input
frequency by grounding or floating the select pins. Neither
microcontroller, software, nor device programmer are
needed to set the frequency. Using Phase Locked Loop
techniques, the device accepts a crystal or clock to produce
output clocks up to 156 MHz at 3.3V, keeping them
frequency locked together.
For simple multipliers to produce common frequencies,
refer to the LOCOTM family of parts, which are smaller and
more cost effective.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined nor guaranteed. For
applications which require defined input to output timing,
use the ICS527-02.
Features
Packaged as 28 pin SSOP (150 mil body)
Highly accurate frequency generation
User determines the output frequency by setting all
internal dividers
Eliminates need for custom oscillators
No software needed
Pull-ups on select inputs
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 156 MHz at 3.3V
Output clock frequencies up to 200 MHz at 5V
Very low jitter
PECL levels set by external resistors
Operating voltage of 3.3V or 5V
Ideal for oscillator replacement
Industrial temperature version available
Advanced, low power CMOS process
Block Diagram
VDD
GND
2
PECL
Reference
Divider
Phase Comparator,
Charge Pump, and
Loop Filter
VCO
Divider
Output
Divider
9
73
R6:R0
V8:V0
S2:S0
RES
VDD
GND
VDD
X1/ICLK
X2
Crystal or
clock input
Optional crystal capacitors
Crystal
Oscillator
560
Ω
82
Ω
820
Ω
82
Ω
820
Ω
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