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參數(shù)資料
| 型號(hào)： | ICS413MT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | PLL BASED CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大小： | 62K |
| 代理商： | ICS413MT |
ICS413
MDS 413 A
1
Revision 040202
In tegr ated Ci r c uit Systems q 52 5 R a ce St r eet, San Jose, CA 95126 q tel ( 408) 295- 9800 q
w w w.ic s t .c o m
PC PERIPHERAL CLOCK
Description
The ICS413 is a cost-effective clock synthesizer
developed to optimize component count for PC
motherboard and peripheral applications. The device
locks all output frequencies to enhance system
performance. By supporting common PC peripheral
interface frequencies including 25 MHz for Ethernet,
24.576 MHz for audio, and selectable 14.318/24.576
MHz, the device lowers chip count enhancing system
cost and reliability.
The ICS413 utilizes a low pin count 8-pin SOIC
package to optimize board space.
ICS is a leader in low jitter and low power consumer
application clock sources. These devices are capable
of supporting CCD, video, audio, USB, CPU, and other
peripherals.
Features
Low operating voltage of 3.3V
Accepts 14.31818 MHz clock input
Fixed 25 MHz clocks for Ethernet
Selectable 14.318/24.576 MHz clock
Fixed 24.576 MHz clock
Power consumption of 9 mA (typ) extends battery life
in notebook applications
Duty cycle of 45 to 55% (24.576M)
Packaged in 8 pin SOIC
Contact ICS for custom frequency requirements
Block Diagram
24.5 76 M
IC LK
14 .3 18 18 M H z
PLL
14 .3 18 /24 .57 6M
25 M
VDD
GND
2
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