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參數(shù)資料
| 型號： | ICS348RPT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK SYNTHESIZER QUAD 20-QSOP |
| 產(chǎn)品變化通告： | Product Discontinuation 13/May/2009 |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | VersaClock™ |
| 類型： | 時鐘/頻率合成器 |
| PLL： | 帶旁路 |
| 輸入： | 時鐘，晶體 |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:9 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 200MHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-QSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 348RPT |
DATASHEET
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
ICS348
IDT / ICS QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER 1
ICS348
REV L 051310
Description
The ICS348 field programmable clock synthesizer
generates up to 9 high-quality, high-frequency clock outputs
including multiple reference clocks from a low frequency
crystal or clock input. The ICS348 has 4 independent
on-chip PLLs and is designed to replace crystals and
crystal oscillators in most electronic systems.
Using IDT’s VersaClockTM software to configure PLLs and
outputs, the ICS348 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include eight selectable configuration registers, up
to two sets of four low-skew outputs.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
The ICS348 is also available in factory programmed custom
versions for high-volume applications.
Features
Packaged as 20-pin SSOP (QSOP) (Pb-free)
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3V
Input crystal frequency of 5 to 27 MHz
Input clock frequency of 2 to 50 MHz
Up to nine reference outputs
Up to two sets of four low-skew outputs
Operating voltages of 3.3 V
Advanced, low power CMOS process
For one output clock, use the ICS341 (8-pin). For two
output clocks, use the ICS342 (8-pin). For three output
clocks, use the ICS343 (8-pin). For more than three
outputs, use the ICS345 or ICS348.
Block Diagram
Cry stal
O sc illator
PLL1
GND
2
3
VDD
PDT S
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
S2:S 0
CLK1
CLK9
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
3
OT P
ROM
with
PLL
V alues
PLL4
X2
C rystal or
clock input
E xternal capacitors are
required w ith a crystal input.
X 1/IC LK
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