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參數(shù)資料
| 型號： | ICS345R-XXLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SSOP-20 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 207K |
| 代理商： | ICS345R-XXLF |
DATASHEET
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
ICS345
IDT / ICS TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 1
ICS345
REV K 110207
Description
The ICS345 field programmable clock synthesizer
generates up to nine high-quality, high-frequency clock
outputs including multiple reference clocks from a
low-frequency crystal or clock input. It is designed to
replace crystals and crystal oscillators in most electronic
systems.
Using IDT’s VersaClockTM software to configure PLLs and
outputs, the ICS345 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include eight selectable configuration registers, up
to two sets of four low-skew outputs, and optional Spread
Spectrum outputs.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
The ICS345 is also available in factory programmed custom
versions for high-volume applications.
Features
Packaged as 20-pin SSOP (QSOP)
Spread spectrum capability
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3 V
Input crystal frequency of 5 to 27 MHz
Input clock frequency of 2 to 50 MHz
Up to nine reference outputs
Up to two sets of four low-skew outputs
Operating voltages of 3.3 V
Advanced, low-power CMOS process
For one output clock, use the ICS341. For two output
clocks, see the ICS342. For three output clocks, see the
ICS343. For more than three outputs, see the ICS345 or
ICS348.
Available in Pb (lead) free packaging
Block Diagram
C rystal
O scillator
PLL1 with
Spread
Spec trum
GN D
2
3
VDD
PD TS
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
S2:S 0
CLK1
CLK9
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
3
OT P
RO M
with
PLL
Values
X2
C rystal or
cloc k input
E xternal capacitors are
required w ith a crystal input.
X1/ICLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS345R-XXLFT | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| ICS411MT | 411 SERIES, PLL BASED CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS504MT | 66.7 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS345R-XXLFT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
| ICS345R-XXT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
| ICS348 | 制造商:ICS 制造商全稱:ICS 功能描述:Quad PLL Field Programmable VersaClock Synthesizer |
| ICS348-22 | 制造商:ICS 制造商全稱:ICS 功能描述:Quad PLL Field Programmable VersaClock Synthesizer |
| ICS348R-22 | 制造商:ICS 制造商全稱:ICS 功能描述:Quad PLL Field Programmable VersaClock Synthesizer |
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