參數(shù)資料
型號(hào): ICS309RT
英文描述: SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
中文描述: 串行可編程三重不銹鋼VERSACLOCK合成器鎖相環(huán)
文件頁(yè)數(shù): 7/8頁(yè)
文件大?。?/td> 132K
代理商: ICS309RT
S
ERIAL
P
ROGRAMMABLE
T
RIPLE
PLL SS V
ERSA
C
LOCK
S
YNTHESIZER
MDS 309 G
7
Revision 122704
Integrated Circuit Systems
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS309
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are min 45% / max 55%
Thermal Characteristics
Power-up time
PDTS goes high until
stable CLK output
PDTS goes high until
stable CLK out,
Spread Spectrum off
PDTS goes high until
stable CLK out,
Spread Spectrum On
Reference Clock
4
10
ms
.2
2
ms
4
7
ms
Maximum Output Jitter, short term
t
j
±300
ps
Maximum Output Jitter, short term
t
j
All other clocks,
C
L
=15 pF
Configuration
±200
ps
Pin-to-Pin Skew
Low Skew Outputs
-250
250
ps
Parameter
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
135
93
78
60
Max.
Units
°
C/W
°
C/W
°
C/W
°
C/W
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
相關(guān)PDF資料
PDF描述
ICS309 RES 470 OHM 1% 1206
ICS309R SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
ICS309RI SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
ICS309RT SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
ICS309RIT SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
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