參數(shù)資料
型號(hào): ICS308RLF
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 3/9頁(yè)
文件大?。?/td> 0K
描述: IC SRL PROGR QUAD PLL CLK 20QSOP
標(biāo)準(zhǔn)包裝: 55
系列: VersaClock™
類(lèi)型: 時(shí)鐘/頻率合成器
PLL: 帶旁路
輸入: 時(shí)鐘,晶體
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:9
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 200MHz
除法器/乘法器: 無(wú)/是
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 20-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 20-QSOP
包裝: 管件
其它名稱(chēng): 308RLF
800-2361-5
ICS308RLF-ND
ICS308
SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER
SER PROG CLOCK SYNTHESIZER
IDT / ICS SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER 3
ICS308
REV L 051310
Configuring the ICS308
Initial State: The ICS308 may be configured to have up to nine frequency outputs, utilizing the four
on-board PLLs. Unprogrammed, the part has the following outputs, related to the reference input clock:
The STROBE pin must have an external 250 kOhm pull-up resistor to achieve the Initial State.
The input crystal range for the ICS308 is 5 MHz to 27 MHz.
The ICS308 can be programmed to set the output functions and frequencies. 160 data bits generated by
the VersaClockTM software are written in DATA pin in this order: MSB (left most bit) first.
As show in Figure 2, after these 160 bits are clocked into the ICS308, taking STROBE high will send this
data to the internal hatch and the CLK output will lock within 10 ms.
Note: STROBE utilizes a transparent latch that is latched when in the high state. If STROBE is in the high
state and SCLK is pulsed, DATA is clocked directly to the internal latch and the output conditions will
change accordingly. Although this will not damage the ICS308, it is recommended that STROBE be kept
low while DATA is being clocked into the ICS308 in order to avoid unintended changes on the output clocks.
All outputs may be turned off during initialization by bringing the PDTS pin to Ground. When PDTS is
brought high, after the Strobe pin in brought high, the programmed output frequencies will be available.
AC Parameters for Writing to the ICS308
Default Outputs
Output
Frequency
Clock 1-9 (Pins 4, 10 - 14)
Reference Output
Parameter
Condition
Min.
Max.
Units
tSETUP
Setup time
10
ns
tHOLD
Hold time after SCLK
10
ns
tW
Data wait time
10
ns
tS
Strobe pulse width
40
ns
SCLK Frequency
30
MHz
DATA
t
hold
t
setup
SCLK
STROBE
t
s
t
w
Figure 2. Tim ing D iagram for Program m ing the IC S308
Bit160
Bit2
Bit1
Bit3
Bit159
Bit158
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