參數(shù)資料
型號: ICS301MT
英文描述: QTClock⑩ Quick Turn Clock Synthesizer
中文描述: QTClock⑩快速打開時(shí)鐘合成器
文件頁數(shù): 2/4頁
文件大?。?/td> 64K
代理商: ICS301MT
REF
Comments
Reference
Reference/2
CLK/2
Off
Buffered oscillator output
Oscillator frequency divided by two
CLK frequency divided by two
Output stopped low. Lowest jitter
MDS 300QT E
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com
2
Revision 111000
ICS300/ICS301/ICS302
QTClock Quick Turn Clock Synthesizer
Pin Assignments
1
2
3
4
8
7
6
5
X1/ICLK
VDD
GND
REF
X2
PDTS
DC
CLK
Number Number
300/1
1
2
3
4
5
6
7
8
Name
Type Description
302
8
2
1, 3
4
5
6
7
-
X1/ICLK
VDD
GND
REF
CLK
DC
PDTS
X2
I
P
P
O
O
-
I
O
Crystal connection or clock input. Clock only on ICS302.
Connect to +3.3V or +5V.
Connect to ground.
Buffered crystal oscillator output clock, or variation per REF clock options table above.
Clock output. Fixed frequency between 6 and 200 MHz programmed at factory.
Don't Connect anything to this pin.
Powers down PLL, and puts both outputs into high impedance state, when low.
Crystal connection. Leave unconnected for clock input.
Pin Descriptions
Key: I = Input, O = output, P = power supply connection
REF Clock Options
External Components / Crystal Selection
The ICS300/301/302 requires a 0.01μF decoupling capacitor to be connected between VDD and GND.
It must be connected close to the ICS300/301/302 to minimize lead inductance. No external power
supply filtering is required for this device. A 33
terminating resistor can be used next to the CLK and
REF pins. The total on-chip capacitance is approximately 16 pF, so a parallel resonant, fundamental mode
crystal should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors
can be connected from each of the pins X1 and X2 to Ground. The value (in pF) of these crystal caps
should be = (CL-16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only
required for applications where the exact frequency is critical. For a clock input, connect to X1/ICLK and
leave X2 unconnected (no capacitors on either).
Device Configuration
The specification is complete when the ICS300/301/302 QTClock Order Form accompanies this data
sheet. The order form lists the input, REF, and CLK actual frequencies, as well as any other available
options. This unique configuration is given a two character alphanumeric programming code, which must
be specified when referring to samples.
ICS300
ICS301
1
2
3
4
8
7
6
5
ICLK
PDTS
DC
CLK
VDD
GND
REF
GND
ICS302
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