參數(shù)資料
型號： ICS1893BFILFT
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 87/133頁
文件大小： 0K
描述： PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： PHYceiver™
類型： PHY 收發(fā)器
規(guī)程： MII
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 48-BSSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 48-SSOP
包裝： 帶卷 (TR)
其它名稱： 1893BFILFT
Chapter 7 Management Register Set
ICS1893BF, Rev. F, 5/13/10
May, 2010
57
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
7.3 Register 1: Status Register
Table 7-6 lists the Status Register bits. These 16 bits of data provide an interface between the ICS1893BF
and an STA. There are two types of status bits: some report the capabilities of the port, and some indicate
the state of signals used to monitor internal circuits.
The STA accesses the Status Register using the Serial Management Interface. During a reset, the
ICS1893BF initializes the Status Register bits to pre-defined, default values.
Note: For an explanation of acronyms used in Table 7-5, see Chapter 1, “Abbreviations and Acronyms”.
As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value
to all Reserved bits.
7.3.1 100Base-T4 (bit 1.15)
The STA reads this bit to learn if the ICS1893BF can support 100Base-T4 operations. Bit 1.15 of the
ICS1893BF is permanently set to logic zero, which informs an STA that the ICS1893BF cannot support
100Base-T4 operations.
Table 7-6. Status Register (Register 1 [0x01])
Bit
Definition
When Bit = 0
When Bit = 1
Ac-
cess
SF
De-
fault
Hex
1.15 100Base-T4
Always 0. (Not supported.) N/A
RO
–
0
7
1.14 100Base-TX full duplex
Mode not supported
Mode supported
CW
–
1
1.13 100Base-TX half duplex Mode not supported
Mode supported
CW
–
1
1.12 10Base-T full duplex
Mode not supported
Mode supported
CW
–
1
1.11 10Base-T half duplex
Mode not supported
Mode supported
CW
–
1
8
1.10 IEEE reserved
Always 0
N/A
CW
–
0
1.9
IEEE reserved
Always 0
N/A
CW
–
0
1.8
IEEE reserved
Always 0
N/A
CW
–
0
1.7
IEEE reserved
Always 0
N/A
CW
–
0
1.6
MF Preamble
suppression
PHY requires MF
Preambles
PHY does not require
MF Preambles
RO
–
0
1.5
Auto-Negotiation
complete
Auto-Negotiation is in
process, if enabled
Auto-Negotiation is
completed
RO
LH
0
1.4
Remote fault
No remote fault detected
Remote fault detected
RO
LH
0
1.3
Auto-Negotiation ability
N/A
Always 1: PHY has
Auto-Negotiation ability
RO
–
1
9
1.2
Link status
Link is invalid/down
Link is valid/established
RO
LL
0
1.1
Jabber detect
No jabber condition
Jabber condition
detected
RO
LH
0
1.0
Extended capability
N/A
Always 1: PHY has
extended capabilities
RO
–
1
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ICS1893BFLFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
ICS1893BFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
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