參數(shù)資料
型號(hào): ICS1893AFILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 45/136頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝: 30
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 管件
其它名稱: 1893AFILF
ICS1893AF, Rev D 10/26/04
October, 2004
16
Chapter 4
Overview of the ICS1893AF
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
Chapter 4
Overview of the ICS1893AF
The ICS1893AF is a stream processor. During data transmission, it accepts sequential nibbles from its
MAC (Media Access Control) converts them into a serial bit stream, encodes them, and transmits them
over the medium through an external isolation transformer. When receiving data, the ICS1893AF converts
and decodes a serial bit stream (acquired from an isolation transformer that interfaces with the medium)
into sequential nibbles. It subsequently presents these nibbles to its MAC Interface.
The ICS1893AF implements the OSI model’s physical layer, consisting of the following, as defined by the
ISO/IEC 8802-3 standard:
Physical Coding sublayer (PCS)
Physical Medium Attachment sublayer (PMA)
Physical Medium Dependent sublayer (PMD)
Auto-Negotiation sublayer
The ICS1893AF is transparent to the next layer of the OSI model, the link layer. The link layer has two
sublayers: the Logical Link Control sublayer and the MAC sublayer. The ICS1893AF can interface directly
to the MAC.
The ICS1893AF transmits framed packets acquired from its MAC Interface and receives encapsulated
packets from another PHY, which it translates and presents to its MAC Interface.
Note:
As per the ISO/IEC standard, the ICS1893AF does not affect, nor is it affected by, the underlying
structure of the MAC/repeater frame it is conveying.
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