- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360742 > ICS1523 High-Performance Programmable Line-Locked Clock Generator PDF資料下載
參數(shù)資料
| 型號： | ICS1523 |
| 英文描述： | High-Performance Programmable Line-Locked Clock Generator |
| 中文描述： | 高性能可編程線鎖定時鐘發(fā)生器 |
| 文件頁數(shù)： | 20/27頁 |
| 文件大?。?/td> | 1216K |
| 代理商： | ICS1523 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
ICS1523
20
Power Supply Considerations
The
ICS1523 incorporates special internal power-on reset circuitry that requires no external reset signal connection. The supply
voltage (VDD) must remain within the recommended operating conditions during normal operation. To reset the ICS1523, the
supply voltage at the part must be reduced below the threshold voltage (V
th
) of the power-on reset circuit. The supply voltage
must remain below that threshold voltage such that board power conditioning capacitors are drained and the proper reset state
is latched. The amount of time (t
d
) to hold the voltage in a reset state varies with the design. However, a typical value of 10 ms
should be sufficient.
SSTL_3 Outputs
Unterminated Outputs
In the
ICS1523, unterminated SSTL output pins display exponential transitions similar to those of rectangular pulses presented to
RC loads. The 10-90% rise time is typically 1.6 ns, and the corresponding fall time is typically 700 ps. In turn, this asymmetry
contributes to duty cycle asymmetry at higher output frequencies. In the absence of significant load capacitance (which can
further increase rise and fall time), this asymmetry is the dominant factor determining high-frequency performance of these single-
ended outputs. Typically, no termination is required either for the LOCK/REF, FUNC, and CLK/2 outputs or for CLK outputs up to
approximately 135 MHz.
Terminated Outputs
SSTL_3 outputs are intended to terminate in low impedances to reduce the effect of external circuit capacitance. Use of transmis-
sion line techniques enables use of longer traces between source and driver without increasing ringing due to reflections. Where
external capacitance is minimal and substantial voltage swing is required to meet LVTTL V
IH
and V
OL
requirements, the intrinsic
rise and fall times of ICS1523 SSTL outputs are only slightly improved by termination in a low impedance.
The ICS1523 SSTL output source impedance is typically less than 60
W
. Termination impedance of 100
W
reduces output swing by
less than 30% which is more than enough to drive a single load of LVTTL inputs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1523M | High-Performance Programmable Line-Locked Clock Generator |
| ICS1524 | Dual Output Phase Controlled SSTL-3/PECL Clock Generator |
| ICS1524M | Dual Output Phase Controlled SSTL-3/PECL Clock Generator |
| ICS1524MT | Dual Output Phase Controlled SSTL-3/PECL Clock Generator |
| ICS1526 | Video Clock Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1523M | 功能描述:IC VIDEO CLK SYNTHESIZER 24-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS1523MLF | 功能描述:IC SYNTHESIZER VIDEO CLK 24-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ICS1523MLFT | 功能描述:IC VIDEO CLK SYNTHESIZER 24-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS1523MT | 功能描述:IC VIDEO CLK SYNTHESIZER 24-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS1524 | 制造商:ICS 制造商全稱:ICS 功能描述:Dual Output Phase Controlled SSTL-3/PECL Clock Generator |
發(fā)布緊急采購，3分鐘左右您將得到回復。