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參數(shù)資料
| 型號： | ICPL2730 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | HIGH SPEED DUAL CHANNEL OPTICALLY COUPLED ISOLATOR PHOTODARLINGTON OUTPUT |
| 中文描述： | 高速雙通道光耦合隔離器PHOTODARLINGTON輸出 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 73K |
| 代理商： | ICPL2730 |
SWITCHING SPECIFICATIONS AT T
A
= 25°C ( V
CC
= 5V Unless otherwise noted )
PARAMETER
SYM DEVICE
MIN TYP MAX UNITS
TEST CONDITION
Propagation Delay Time
to
Logic Low at Output
( fig 1 )( note 5 )
ICPL2731
ICPL2730/1
ICPL2730/1
25
0.5
4.0
100
2
20
μ
s
μ
s
μ
s
I
F
= 0.5mA,R
L
= 4.7k
I
F
= 12mA,R
L
= 270
I
F
= 1.6mA,R
L
= 2.2k
t
PHL
Propagation Delay Time
to
Logic High at Output
( fig 1 )( note 5 )
ICPL2731
ICPL2730/1
ICPL2730/1
20
4
12
60
10
35
μ
s
μ
s
μ
s
I
F
= 0.5mA,R
L
= 4.7k
I
F
= 12mA,R
L
= 270
I
F
= 1.6mA,R
L
= 2.2k
t
PLH
Common Mode Transient
Immunity at Logic High
Level Output ( fig 2 )( note 9 )
CM
H
1000 10000
V/
μ
s
I
F
= 0mA, V
CM
= 10V
PP
R
L
= 2.2k
Common Mode Transient
Immunity at Logic Low
Level Output ( fig 2 )( note 8 )
CM
L
-1000 -10000
V/
μ
s
I
F
= 1.6mA,V
CM
= 10V
PP
R
L
= 2.2k
NOTES:-
1.
2.
3.
4.
Derate linearly above 70
o
C free air temperature at a rate of 0.5 mA/°C.
Derate linearly above 70
o
C free air temperature at a rate of 0.9 mW/°C.
Derate linearly above 70
o
C free air temperature at a rate of 0.6 mA/°C.
Derate linearly above 35
o
C free air temperature at a rate of 1.7 mW/°C.
Output power = (Collector output) + (Supply output).
Each channel.
CURRENT TRANSFER RATIO is defined as the ratio of output collector current,I
O
, to the forward LED
input current, I
times 100%.
Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
Common mode transient immunity in Logic Low level is the maximum tolerable (negative) dVcm/dt on
the trailing edge of the common mode pulse signal, V
to assure that the output will remain in Logic
Low state (i.e. V
< 0.8V).Measured in volts per microsecond (V/
μ
s).
Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVcm/dt on
the leading edge of the common mode pulse V
to assure that the output will remain in a Logic High
state (i.e. V
> 2.0V).Measured in volts per microsecond (V/
μ
s).
Device considered a two-terminal device: pins 1,2,3, and 4 shorted together and pins 5,6,7 and 8 shorted
together.
5.
6.
7.
8.
9.
10.
FIG.1 SWITCHING TEST CIRCUIT
2
I
F
Monitor
0
I
F
V
O
1.5V
100
1.5V
5V
t
PHL
t
PLH
V
OL
R
L
V
O
C
L
= 15pF
8
7
6
5
PULSE
GENERATOR
Z
O
= 50
t
r
= 5ns
I
F
1
4
3
10% Duty Cycle
1/f < 100
μ
s
5V
DB92018-AAS/A2
7/12/00
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