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參數(shù)資料
| 型號： | ICPL2631 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | DUAL CHANNEL, HIGH CMR, VERY HIGH SPEED OPTICALLY COUPLED ISOLATOR LOGIC GATE OUTPUT |
| 中文描述： | 雙通道，高CMR，超高速光耦合隔離器邏輯門輸出 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 68K |
| 代理商： | ICPL2631 |
SWITCHING SPECIFICATIONS AT T
A
= 25°C ( V
CC
= 5V, I
F
= 7.5mA Unless otherwise noted )
PARAMETER
Propagation Delay Time
to
Logic Low at Output
( fig 1 )( note2 )
SYM
DEVICE
MIN TYP MAX UNITS
TEST CONDITION
t
PHL
55
75
ns
R
L
= 350
,
C
L
= 15pF
Propagation Delay Time
to
Logic High at Output
( fig 1 )( note3 )
t
PLH
45
75
ns
R
L
= 350
,
C
L
= 15pF
Common Mode Transient
Immunity at Logic High
Level Output ( fig 2 )( note7 )
CM
H
ICPL2630
ICPL2631 1000 10000
10000
V/
μ
s
V/
μ
s
I
F
= 0mA, V
CM
= 50V
R
L
= 350
,
V
OH
= 2Vmin.
Common Mode Transient
Immunity at Logic Low
Level Output ( fig 2 )( note8 )
CM
L
ICPL2630
ICPL2631 -1000 -10000
-10000
V/
μ
s
V/
μ
s
V
CM
= 50V
PP
R
L
,
V
OL
=0.8Vmax.
NOTES:-
1
Bypassing of the power supply line is required, with a 0.01
μ
F ceramic disc capacitor adjacent to
each isolator. The power supply bus for the isolator(s) should be seperate from the bus for any
active loads. Otherwise a larger value of bypass capacitor (up to 0.1
μ
F) may be needed to supress
regenerative feedback via the power supply.
The t
propagation delay is measured from the 3.75 mA level Low to High transition of the input
current pulse to the 1.5V level on the High to Low transition of the output voltage pulse.
The t
propagation delay is measured from the 3.75mA level High to Low transition of the input
current pulse to the 1.5V level on the Low to High transition of the output voltage pulse.
Device considered a two terminal device; pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7
and 8 shorted together.
Each channel.
Measured between pins 1 and 2 shorted together and pins 3 and 4 shorted together.
CM
is the maximum tolerable rate of rise of the common mode voltage to assure that the output
will remain in a high logic state (ie Vout > 2.0V).
CM
is the maximum tolerable rate of fall of the common mode voltage to assure that the output
will remain in a low logic state (ie Vout < 0.8V)
2
3
4
5
6
7
8
DB92601-AAS/A1
9/10/00
FIG.1 SWITCHING TEST CIRCUIT
2
I
F
Monitor
0
I
F
V
O
1.5V
100
1.5V
5V
t
PHL
t
PLH
V
OL
R
L
V
O
C
L
= 15pF
8
7
6
5
PULSE
GENERATOR
Z
O
= 50
t
r
= 5ns
I
F
1
4
3
5V
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