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參數(shù)資料
| 型號： | ICM7232 |
| 廠商： | Intersil Corporation |
| 英文描述： | Numeric/Alphanumeric Triplexed LCD Display Drivers |
| 中文描述： | 數(shù)字/字母數(shù)字液晶顯示驅(qū)動(dòng)器Triplexed |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 103K |
| 代理商： | ICM7232 |
9-27
The degree of polarization of the liquid crystal material and
thus the contrast of any intersection depends on the RMS
voltage across the intersection capacitance. Note from
Figure 7 that the RMS OFF voltage is always V
P
/3 and that
the RMS ON voltage is always 1.92V
PEAK
/3.
For a
1
/
3
multiplexed LCD, the ratio of RMS ON to OFF
voltages is fixed at 1.92, achieving adequate display contrast
with this ratio of applied RMS voltage makes some demands
on the liquid crystal material used.
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
V
DD
V
H
V
L
V
DISP
BP1
BP2
BP3
ALL ON
a
,
g
ON
d OFF
a
SEGMENT
ON
a
,
d
OFF
SEGMENT
LINE
ALL OFF
φ
1
φ
2
φ
3
φ
1′
φ
2′
φ
3′
V
P
V
DD
~
75k
V
H
~
75k
V
L
~
75k
PIN 2
V
DISP
ON CHIP
RESISTOR
STRING
INPUT
COMMON LINE
WAVEFORMS
TYPICAL
SEGMENT LINE
WAVEFORMS
NOTES:
1.
φ
1,
φ
2,
φ
3, - BP High with Respect to Segment.
2.
φ
1′,
φ
2′,
φ
3′, - BP Low with Respect to Segment.
3. BP1 Active during
φ
1, and
φ
1′.
4. BP2 Active during
φ
2, and
φ
2′.
5. BP3 Active during
φ
3, and
φ
3′.
FIGURE 5. DISPLAY VOLTAGE WAVEFORMS
BP1
BP2
BP3
f
e
an
2
a
g
d
b
c
an
1
SEGMENT
LINES
FIGURE 6. DISPLAY SCHEMATIC
φ
1
φ
2
φ
3
φ
1′
φ
2′
φ
3′
ALL ON
a, g ON
d OFF
a SEGMENT
ON
a, d OFF
ALL OFF
+VP
0
-VP
+VP
0
-VP
+VP
0
-VP
+VP
0
-VP
VP = (V+) - VDISP
V
RMS
-------
V
RMS
OFF
=
=
V
RMS
3
----------
-------
×
V
RMS
ON
=
=
NOTES:
1.
φ
1,
φ
2,
φ
3, - BP High with Respect to Segment.
2.
φ
1′,
φ
2′,
φ
3′, - BP Low with Respect to Segment.
3. BP1 Active during
φ
1, and
φ
1′.
4. BP2 Active during
φ
2, and
φ
2′.
5. BP3 Active during
φ
3, and
φ
3′.
FIGURE 7. VOLTAGE WAVEFORMS ON SEGMENT g(V
G
)
Voltage Contrast Ratio
V
ON
RMS
-----------------------------
3
----------
1.92
=
=
=
ICM7231, ICM7232
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