參數(shù)資料
型號(hào)： ICL8068CDD
廠商： INTERSIL CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： 14-Bit/16-Bit, Microprocessor- Compatible, 2-Chip, A/D Converter
中文描述： SPECIALTY ANALOG CIRCUIT, CDIP14
封裝： CERDIP-14
文件頁(yè)數(shù)： 19/19頁(yè)
文件大?。?/td> 168K
代理商： ICL8068CDD
3-52
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
ICL71C03 with ICL8052/8068 Integrating A/D Converter Equations
The ICL71C03 does not have an internal crystal or RC
oscillator. It has a clock input only.
Integration Period
Integration Clock Period
t
CLOCK
= 1/f
CLOCK
60/50Hz Rejection Criterion
t
INT
/t
60Hz
or t
INT
/t
50Hz
= Integer
Optimum Integration Current
I
INT
= 20
μ
A
Full Scale Analog Input Voltage
V
INFS
(Typ) = 200mV to 2.0V = 2V
REF
Integrate Resistor
Integrate Capacitor
Integrator Output Voltage
t
-------------------------------
=
V
INT
(Typ) = 9V
Output Count
NOTE: The 4
1
/
2
digit mode’s LSD will be output as a zero in the 3
1
/
2
digit mode.
Output Type:
4 Nibbles BCD with Polarity and Over-range.
Power Supply:
±
15V, +5V
V++ = +15V
V- = -15V
V+ = +5V
V
REF
1.75V
If V
REF
not used, float output pin.
Auto Zero Capacitor Values
0.01
μ
F < C
AZ
< 1
μ
F
Reference Capacitor Value
C
REF
= (Buffer Gain) x C
AZ
t
INT
CLOCK
CLOCK
---------------------
4-1/2 Digit
(
)
=
t
INT
---------------------
3-1/2 Digit
(
)
=
R
INT
BufferGain
-------------------------------------------------------------
(
)
V
×
INT
=
C
INT
t
-------------------------------
(
)
I
INT
(
)
=
V
INT
(
)
I
INT
(
)
Count
10 000
V
REF
V
REF
--------------
×
(4-1/2 Digit)
=
Count
1 000
--------------
×
(3-1/2 Digit)
=
FIGURE 20. INTEGRATOR OUTPUT
AUTO ZERO
(COUNTS)
30,001 - 10,001
3,001 - 1,001
INTEGRATE
(FIXED COUNT)
10,000
1,000
DEINTEGRATE
(COUNTS)
1 - 20,001
1 - 2,001
(4
1
/
2
DIGIT)
(3
1
/
2
DIGIT)
TOTAL CONVERSION TIME (t
CONV
)
(IN CONTINUOUS MODE)
t
CONV
= 40,002 * t
CLOCK
(4
1
/
2
DIGIT MODE)
t
CONV
= 4,002 * t
CLOCK
(3
1
/
2
DIGIT MODE)
ICL8052/ICL71C03, ICL8068/ICL71C03
相關(guān)PDF資料
PDF描述
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