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參數(shù)資料
| 型號： | ICL7135CDW |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | RS-232 |
| 英文描述： | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
| 中文描述： | 5V的高速RS - 232收發(fā)器與0.1uF電容 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 146K |
| 代理商： | ICL7135CDW |
ICL7135C, TLC7135C
4 1/2-DIGIT PRECISION
ANALOG-TO-DIGITAL CONVERTERS
SLAS074B – DECEMBER 1986 – REVISED MAY 1999
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
minimum clock frequency
The minimum clock frequency limitations result from capacitor leakage from the auto-zero and reference
capacitors. Measurement cycles as high as 10
μ
s are not influenced by leakage error.
rejection of 50-Hz or 60-Hz pickup
To maximize the rejection of 50-Hz or 60-Hz pickup, the clock frequency should be chosen so that an integral
multiple of 50-Hz or 60-Hz periods occur during the signal integrate phase. To achieve rejection of these signals,
some clock frequencies that can be used are:
50 Hz: 250, 166.66, 125, 100 kHz, etc.
60 Hz: 300, 200, 150, 120, 100, 40, 33.33 kHz, etc.
zero-crossing flip-flop
This flip-flop interrogates the comparator’s zero-crossing status. The interrogation is performed after the
previous clock cycle and the positive half of the ongoing clock cycle has occurred, so any comparator transients
that result from the clock pulses do not affect the detection of a zero-crossing. This procedure delays the
zero-crossing detection by one clock cycle. To eliminate the inaccuracy, which is caused by this delay, the
counter is disabled for one clock cycle at the beginning of the deintegrate phase. Therefore, when the
zero-crossing is detected one clock cycle later than the zero-crossing actually occurs, the correct number of
counts is displayed.
noise
The peak-to-peak noise around zero is approximately 15
μ
V (peak-to-peak value not exceeded 95% of the
time). Near full scale, this value increases to approximately 30
μ
V. Much of the noise originates in the auto-zero
loop, and is proportional to the ratio of the input signal to the reference.
analog and digital grounds
For high-accuracy applications, ground loops must be avoided. Return currents from digital circuits must not
be sent to the analog ground line.
power supplies
The ICL7135C and TLC7135C are designed to work with
±
5-V power supplies. However, 5-V operation is
possible when the input signal does not vary more than
±
1.5 V from midsupply.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICL7135CJI | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ICL7135CMH | 制造商:Maxim Integrated Products 功能描述:4 1/2 DIGIT ADC WITH MULTIPLEXED BCD OUTPUTS - Bulk |
| ICL7135CMH+ | 制造商:Maxim Integrated Products 功能描述:ADC SGL DUAL SLOPE 4 1/2DIGIT BCD 44MQFP - Rail/Tube |
| ICL7135CMH+D | 制造商:Maxim Integrated Products 功能描述:4 1/2 DIGIT ADC WITH MULTIPLEXED BC - Rail/Tube |
| ICL7135CMH+T | 制造商:Maxim Integrated Products 功能描述:ADC SGL DUAL SLOPE 4 1/2DIGIT BCD 44MQFP - Tape and Reel |
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