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參數(shù)資料
| 型號： | ICL7135C |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | RS-232 |
| 英文描述： | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
| 中文描述： | 5V的高速RS - 232收發(fā)器與0.1uF電容 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 146K |
| 代理商： | ICL7135C |
ICL7135C, TLC7135C
4 1/2-DIGIT PRECISION
ANALOG-TO-DIGITAL CONVERTERS
SLAS074B – DECEMBER 1986 – REVISED MAY 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing diagrams (continued)
D1
D2
D3
D4
Deintegrate
Signal Integrate
AUTO ZERO
D5
Digit Scan
for OVER RANGE
STROBE
First D5 of AUTO ZERO and deintegrate is one count longer.
Figure 4
PRINCIPLES OF OPERATION
A measurement cycle for the ICL7135C and TLC7135C consists of the following four phases.
1.
Auto-Zero Phase. The internal IN+ and IN– inputs are disconnected from the terminals and internally
connected to ANLG COMMON. The reference capacitor is charged to the reference voltage. The
system is configured in a closed loop and the auto-zero capacitor is charged to compensate for offset
voltages in the buffer amplifier, integrator, and comparator. The auto-zero accuracy is limited only by the
system noise, and the overall offset, as referred to the input, is less than 10
μ
V.
2.
Signal Integrate Phase. The auto-zero loop is opened and the internal IN+ and IN– inputs are
connected to the external terminals. The differential voltage between these inputs is integrated for a
fixed period of time. When the input signal has no return with respect to the converter power supply, IN–
can be tied to ANLG COMMON to establish the correct common-mode voltage. Upon completion of this
phase, the polarity of the input signal is recorded.
3.
Deintegrate Phase. The reference is used to perform the deintegrate task. The internal IN– is internally
connected to ANLG COMMON and IN+ is connected across the previously charged reference
capacitor. The recorded polarity of the input signal ensures that the capacitor is connected with the
correct polarity so that the integrator output polarity returns to zero. The time required for the output to
return to zero is proportional to the amplitude of the input signal. The return time is displayed as a digital
reading and is determined by the equation 10,000
×
(V
ID
/V
ref
). The maximum or full-scale conversion
occurs when V
ID
is two times V
ref
.
Zero Integrator Phase. The internal IN– is connected to ANLG COMMON. The system is configured in a
closed loop to cause the integrator output to return to zero. Typically, this phase requires 100 to 200
clock pulses. However, after an over-range conversion, 6200 pulses are required.
4.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICL7135C/D | 功能描述:顯示驅(qū)動器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| ICL7135C_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS |
| ICL7135CAI | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ICL7135CAI+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4 1/2 Digit ADC w/ MUXd BCD Outputs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ICL7135CAI+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4 1/2 Digit ADC w/ MUXd BCD Outputs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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