參數(shù)資料
型號: ICE3B5565P
廠商: INFINEON TECHNOLOGIES AG
英文描述: TVS BIDIRECT 400W 120V SMA
中文描述: 離線式開關(guān)電源電流模式控制器,集成了?650V啟動單元/的CoolMOS
文件頁數(shù): 13/30頁
文件大?。?/td> 1223K
代理商: ICE3B5565P
CoolSET-F3
Functional Description
Version 1.3
13
15 Sep 2004
3.4
PWM Section
Figure 9
PWM Section
3.4.1
The oscillator generates a fixed frequency. The
switching frequency of ICE3Axx65x is f
= 100kHz
and for ICE3Bxx65x f
= 67kHz. A resistor, a
capacitor and a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of D
max
=0.72.
Oscillator
3.4.2
The oscillator clock output provides a set pulse to the
PWM-Latch when initiating the external Power Switch
conduction. After setting the PWM-Latch can be reset
by the PWM comparator, the Soft Start comparator or
the Current-Limit comparator. In case of resetting, the
driver is shut down immediately.
PWM-Latch FF1
3.4.3
Gate Driver
Figure 10
Gate Driver
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing
the switch on slope when exceeding the internal
CoolMOS threshold. This is achieved by a slope
control of the rising edge at the driver’s output (see
Figure 10).
Figure 11
Gate Rising Slope
Thus the leading switch on spike is minimized. When
the integrated CoolMOS is switched off, the falling
shape of the driver is slowed down when reaching 2V
to prevent an overshoot below ground. Furthermore the
driver circuit is designed to eliminate cross conduction
of the output stage. During powerup when VCC is
below the undervoltage lockout threshold V
, the
output of the Gate Driver is low to disable power
transfer to the seconding side.
Oscillator
Duty Cycle
max
Gate Driver
0.72
Clock
&
G9
1
G8
PWM Section
FF1
R
S
Q
Gate
Soft Start
Comparator
PWM
Comparator
Current
Limting
VCC
1
PWM-Latch
CoolMOS
Gate Driver
Gate
t
(internal) V
Gate
5V
ca. t = 130ns
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