- 您現在的位置：買賣IC網 > PDF目錄360717 > IC42S16800L-8TI(G) 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM PDF資料下載
參數資料
| 型號： | IC42S16800L-8TI(G) |
| 英文描述： | 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 4（2）M中的x 8（16）位× 4銀行（128 - Mbit的）同步動態(tài)RAM |
| 文件頁數： | 15/69頁 |
| 文件大?。?/td> | 1118K |
| 代理商： | IC42S16800L-8TI(G) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁
IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
Integrated Circuit Solution Inc.
DR023-0E 6/11/2004
15
CKE RELATED COMMAND TRUTH TABLE
(1)
CKE
n-1
Current State
Operation
n
CS
RAS
CAS
WE
Address
Self-Refresh (S.R.)
INVALID, CLK (n - 1)would exit S.R.
Self-Refresh Recovery
(2)
Self-Refresh Recovery
(2)
Illegal
Illegal
Maintain S.R.
Idle After t
RC
Idle After t
RC
Illegal
Illegal
Begin clock suspend next cycle
(5)
Begin clock suspend next cycle
(5)
Illegal
Illegal
Exit clock suspend next cycle
(2)
Maintain clock suspend
INVALID, CLK (n - 1) would exit P.D.
EXIT P.D.
→
Idle
(2)
Maintain power down mode
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Auto-Refresh
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Self-Refresh
(3)
Refer to operations in Operative Command Table
Power-Down
(3)
Refer to operations in Operative Command Table
Begin clock suspend next cycle
(4)
Exit clock suspend next cycle
Maintain clock suspend
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
X
H
H
H
H
L
H
H
H
H
L
L
L
L
H
L
X
H
L
H
H
H
H
H
L
L
L
L
L
X
H
L
H
L
X
H
L
L
L
X
H
L
L
L
H
L
L
L
X
X
X
X
X
H
L
L
L
L
H
L
L
L
L
X
X
X
X
X
X
X
H
H
L
X
X
H
H
L
X
H
H
L
X
X
X
X
X
X
H
L
L
L
X
H
L
L
L
X
X
X
X
X
X
X
H
L
X
X
X
H
L
X
X
H
L
X
X
X
X
X
X
X
X
H
L
L
X
X
H
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
L
X
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
—
X
X
—
—
—
X
Op - Code
—
—
—
X
Op - Code
X
X
X
X
X
Self-Refresh Recovery
Power-Down (P.D.)
Both Banks Idle
Any state
other than
listed above
Notes:
1.
2.
H : Hight level, L : low level, X : High or low level (Don’t care).
CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied
before any command other than EXIT.
Power down and Self refresh can be entered only from the both banks idle state.
Must be legal command as defined in Operative Command Table.
Illegal if t
SREX
is not satisfied.
3.
4.
5.
相關PDF資料 |
PDF描述 |
|---|---|
| IC42S16800-8TIG | ER 14C 14#16 SKT PLUG |
| IC42S16800L-8TIG | 4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32200 | RES 1M-OHM 1% 0.1W 100PPM THICK-FILM SMD-0603 5K/REEL-7IN-PA |
| IC42S32200L | 512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32202L-8BIG | 512K x 32 Bit x 4 Banks (64-MBIT) SDRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IC42S32200 | 制造商:ICS 制造商全稱:ICS 功能描述:512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32200/L-6B | 制造商:ICS 制造商全稱:ICS 功能描述:512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32200/L-6BG | 制造商:ICS 制造商全稱:ICS 功能描述:512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32200/L-6BI | 制造商:ICS 制造商全稱:ICS 功能描述:512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IC42S32200/L-6BIG | 制造商:ICS 制造商全稱:ICS 功能描述:512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。