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參數(shù)資料
| 型號： | IBM39MPEGCS24PFA16C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CS24 Digital Audio/Video Decoders |
| 中文描述： | CS24數(shù)字音頻/視頻解碼器 |
| 文件頁數(shù)： | 14/25頁 |
| 文件大?。?/td> | 112K |
| 代理商： | IBM39MPEGCS24PFA16C |
IBM39MPEGS42x
IBM39MPEGSI
MPEG S422, MPEG S420 and MPEG SI Encoders
SI Encoder Operations/Features
14 of 25
Sseries_sds_071701.fm.
02
July 17, 2001
SI Encoder Operations/Features
This section, describes the encoder operations and features of the MPEGSI product. Please refer to Section 8.4
Basic Register Definitions of the MPEG-2 S-Series Encoder User Application Guide, for a detailed description of
each host register referenced.
MPEG-2 Support
The MPEG-2 standard defines several syntactic subsets at which compliant encoders and decoders may operate.
These subsets were defined to make the implementation of encoders and decoders more practical. Each subset is
defined in terms of a
profile
and a
level
. The profile designation represents the syntactic subset of the MPEG-2
standard supported by a given encoder or decoder implementation, and the level designation provides constraints
for various bitstream parameters.
The encoder conforms to the 4:2:2 Profile at Main Level (4:2:2P@ML) specifications provided in the MPEG-2
standard. In addition, the following syntactic subsets of 4:2:2P@ML are supported by the encoder:
MP@ML (Main Profile at Main Level)
MP@HL (Main Profile at High Level)
SP@ML (Simple Profile at Main Level)
ISO/IEC 11172 (MPEG-1)
The user can choose the syntactic subset based upon the user-specified parameters in effect while encoding a
given sequence. For example, Host Register X’23’, bits 6 and 5, enables the user to select the output profile. Also,
the user can produce an MPEG-1 compliant bitstream by setting the user-specified parameters listed in Section
7.1.1, “Overview” of the MPEG-2 S-Series Encoder User Application Guide.
VBV Buffer Size
At chip power on and initialization, the VBV buffer size is set to a default value based on how the following
initialization parameters are set by the application:
MPEG Standard via Host Register X'00', bit 0
Profile Configuration via Host Register X'23', bits 6 and 5
Bitrate via Host Register X'01' and Host Register X'02', bits 13 to 12
DC Precision via Host Register X'28', bits 1 to 0
SIF Picture Resolution via Host Registers X'07', bits 6 and 1, X'0A', bits 11 to 0, X'15', bits 11 to 0, X'19', bit 0,
and command code X'000C' to Host Register X'3E'
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM39MPEGCS24 | Connector,Hybrid D-Shell,PCB Mnt,PLUG,12+5 Contacts,SKT,PC TAIL Terminal,HOLE .112-.124 |
| IBM39MPEGCS24DEPFA16C | CS24 Digital Audio/Video Decoders |
| IBM43GAENGP0001 | Telecommunication IC |
| IBM43RCLNA1115 | RF AMPLIFIER|SINGLE|BIPOLAR|TSSOP|8PIN|PLASTIC |
| IBM43RCLNA1116 | MICROWAVE/MILLIMETER WAVE AMPLIFIER|SINGLE|TSSOP|8PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM39MPEGCS24PFB16C | 制造商:IBM 功能描述: |
| IBM39MPEGS420PBA18C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| IBM39MPEGS422PBA17C | 制造商:IBM 功能描述: 制造商:IBM 功能描述:Video/TV Circuit, Video PROCESSING/ENDEC FOR MPEG, 352 Pin, Plastic, BGA |
| IBM39MPEGSE10CFB18C | 制造商:IBM 功能描述: |
| IBM39MPEGSE20CFB18C | 制造商:IBM 功能描述: |
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