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參數(shù)資料
| 型號： | I5216S |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | 8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| 中文描述： | 960 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件頁數(shù)： | 47/83頁 |
| 文件大?。?/td> | 758K |
| 代理商： | I5216S |
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I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
- 47
Revision A1
Master Clock Input Table for ChipCorder Section
F
MCLK
FLD1 FLD0
CKD2
CKDV
Sample Rate
Filter Knee
13.824 MHz
0
0
0
0
8.0 kHz
3.7 kHz
20.48 MHz
0
0
0
1
8.0 kHz
3.7 kHz
27.648 MHz
0
0
1
0
8.0 kHz
3.7 kHz
40.96 MHz
0
0
1
1
8.0 kHz
3.7 kHz
13.824 MHz
0
1
0
0
6.4 kHz
2.9 kHz
20.48 MHz
0
1
0
1
6.4 kHz
2.9 kHz
27.648 MHz
0
1
1
0
6.4 kHz
2.9 kHz
40.96 MHz
0
1
1
1
6.4 kHz
2.9 kHz
13.824 MHz
1
0
0
0
5.3 kHz
2.5 kHz
20.48 MHz
1
0
0
1
5.3 kHz
2.5 kHz
27.648 MHz
1
0
1
0
5.3 kHz
2.5 kHz
40.96 MHz
1
0
1
1
5.3 kHz
2.5 kHz
13.824 MHz
1
1
0
0
4.0 kHz
1.8 kHz
20.48 MHz
1
1
0
1
4.0 kHz
1.8 kHz
27.648 MHz
1
1
1
0
4.0 kHz
1.8 kHz
40.96 MHz
1
1
1
1
4.0 kHz
1.8 kHz
Because the anti-aliasing and smoothing filters track the Sample Rate Select bits, one must, for
optimum performance, maintain the external clock at one of the four possible frequencies shown in the
table for
Analog Structure (Right Half)
description on page 36
AND
set the Sample Rate Configuration
bits to one of the four values in order to properly set the filters to their correct cutoff frequency as
described in
Analog Structure (Right Half)
description on page 36. The duty cycle on the input clock is
not critical when CKD2 is set to ONE, as the clock is immediately divided by two (internally). If the
MCLK is not used, this input should be connected to V
SSD
.
A0, A1 (Address Pins)
These two pins are normally strapped for the desired address that the Winbond I5216 will have on the
I
C serial interface. If there are four of these devices on the bus, then each must be strapped
differently in order to allow the master device to address them individually. The possible addresses
range from 80h to 87h, depending upon whether the device is being written to, or read from, by the
host.
The Winbond I5216 has a 7-bit slave address of which only A0 and A1 are pin programmable. The
eighth bit (LSB) is the R/W bit. Thus, the address will be 1000 0xy0 or 1000 0xy1
相關PDF資料 |
PDF描述 |
|---|---|
| I5216SD | 8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I5216SI | 8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I5216X | 8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I7032 | 200 Mbps Laser-Diode Driver |
| I7032-EN | 200 Mbps Laser-Diode Driver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| I5216SD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I5216SI | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I5216X | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC |
| I521-7J3-20.000 | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Surface Mount Oscillator, TCXO, TCVCXO Metal Package, 11 mm x 18 mm |
| I521-7J5-20.000 | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Surface Mount Oscillator, TCXO, TCVCXO Metal Package, 11 mm x 18 mm |
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