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參數(shù)資料
| 型號： | I5108X |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 480 SEC, SPEECH SYNTHESIZER WITH RCDG, UUC25 |
| 封裝： | DIE-25 |
| 文件頁數(shù)： | 20/88頁 |
| 文件大小： | 612K |
| 代理商： | I5108X |
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ISD5100 – SERIES
- 20 -
7.3.5. Configuration Resiter Bytes
The configuration register bytes are defined, in detail, in the drawings of
section 7.4
on page 29. The
drawings display how each bit enables or disables a function of the audio paths in the ISD5100-
Series. The tables below give a general illustration of the bits. There are two configuration registers,
CFG0 and CFG1, so there are four 8-bit bytes to be loaded during the set-up of the device.
AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 AOS2 AOS1 AOS0 AOPD OPS1 OPS0 OPA1 OPA0 VLPD
Configuration Register 0 (CFG0)
ANA IN AMP Gain SET (2 bits)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D 6 D5 D4 D3 D2 D1 D0
Volume Control Power Down
SPKR & AUX OUT Control (2 bits)
OUTPUT MUX Select (2 bits)
ANA OUT Power Down
AUXOUT MUX Select (3 bits)
INPUT SOURCE MUX Select (1 bit)
AUX IN Power Down
AUX IN AMP Gain SET (2 bits)
ANA IN Power Down
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