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參數(shù)資料
| 型號(hào)： | I5108EI |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 480 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28 |
| 封裝： | 8 X 13.40 MM, PLASTIC, TSOP1-28 |
| 文件頁(yè)數(shù)： | 34/88頁(yè) |
| 文件大?。?/td> | 612K |
| 代理商： | I5108EI |
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ISD5100 – SERIES
- 34 -
MIC+
MC–
ACAP
FTHRU
AGC
1 (AGPD)
6 dB
To AutoMute
(Playback Only)
*
* Differental Path
AGC
MIC IN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
VLS1
VLS0
VOL2
VOL1
VOL0
S1S1
S1S0
S1M1
S1M0 S2M1
S2M0
FLS0
FLD1
FLD0
FLPD
AGPD
CFG1
ANA IN (Analog Input)
The ANA IN pin is the analog input from the telephone chip set. It can be switched (by the I
2
C
interface) to the speaker output, the array input or to various other paths. This pin is designed to
accept a nominal 1.11 V p-p when at its minimum gain (6 dB) setting. There is additional gain
available, if required, in 3 dB steps, up to 15 dB. The gain settings are controlled from the
I
2
C
interface.
ANA IN
Input
ANA IN Amplifier Gain Settings
1
AGPD
CONDITION
0
Power Up
1
Power Down
Gain
Setting
00
01
10
11
Resistor Ratio
(Rb/Ra)
63.9 / 102
77.9 / 88.1
92.3 / 73.8
106 / 60
Gain
Gain
2
(dB)
-4.1
-1.1
1.9
4.9
0.625
0.883
1.250
1.767
Note: Ra & Rb are in k
CFG0
Setting
(1)
0TLP Input
V
P-P
AIG1
0
0
1
1
AIG0
0
1
0
Gain
(2)
Array
In/Out V
P-P
Speaker
Out V
P-P
2.22
2.22
2.22
2.22
(4)
6 dB
9 dB
12 dB
15 dB
1.110
0.785
0.555
0.393
0.625
0.883
1.250
1.767
0.694
0.694
0.694
0.694
ANA IN
Input Amplifier
NOTE:
f
CUTTOFF
2xR
a
C
COUP
1
Ra
Rb
C
COUP =
0.1
μ
F
Internal to the device
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