參數(shù)資料
型號: HYS72V32300GR-7-D
廠商: INFINEON TECHNOLOGIES AG
英文描述: PC133 Registered SDRAM-Modules
中文描述: PC133的SDRAM的注冊模塊
文件頁數(shù): 16/22頁
文件大?。?/td> 593K
代理商: HYS72V32300GR-7-D
HYS 72Vxx3xxGR
PC133 Registered SDRAM-Modules
INFINEON Technologies
16
2002-07-18
25
Min. Clock Cycle Time at
CL = 1
Max. Data Access Time from
Clock at CL = 1
SDRAM Minimum
t
RP
SDRAM Minimum
t
RRD
SDRAM Minimum
t
RCD
SDRAM Minimum
t
RAS
Module Bank Density (per
bank)
not
supported
not supp.
00
26
00
27
28
29
30
31
15 ns
14 ns
15 ns
37 ns
128 MByte
256 Mbyte
512 MByte
1024 MByte
1.5 ns
0.8 ns
1.5 ns
0F
0E
0F
25
20
20
40
40
80
80
01
01
32
33
34
SDRAM Input Setup Time
SDRAM Input Hold Time
SDRAM Data Input Setup
Time
SDRAM Data Input Hold
Time
Superset Information
(may be used in future)
SPD Revision
Checksum for Bytes 0 - 62
64-125
Manufacturer’s Information
126
Frequency Specification
127
Details of Clocks
128+
Unused Storage Locations
15
08
15
35
0.8 ns
08
36-61
00
62
63
JEDEC 2
12
8E
16
2F
B9
F2
F3
74
75
64
8F
FF
Byte# Description
SPD
Entry
Value
Hex
5
1
H
1
H
2
H
2
H
H
1
H
1
H
2
H
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