參數(shù)資料
型號(hào)： HYS72T64400HFD-3.7-A
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Fully-Buffered DDR2 SDRAM Modules
中文描述： 64M X 72 DDR DRAM MODULE, DMA240
封裝： GREEN, DIMM-240
文件頁(yè)數(shù)： 12/42頁(yè)
文件大小： 1052K
代理商： HYS72T64400HFD-3.7-A
Internet Data Sheet
Rev. 1.2, 2006-11
03292006-GUME-ERC3
12
HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A
3
Basic Functionality
The Advanced Memory Buffer (AMB) reference design complies with the FB-DIMM Architecture and Protocol Specification.
3.1
Advanced Memory Buffer Functionality
The Advanced Memory Buffer will perform the following FB-
DIMM channel functions:
Supports channel initialization procedures as defined in
the initialization chapter of the FB-DIMM Architecture and
Protocol Specification to align the clocks and the frame
boundaries, verify channel connectivity, and identify AMB
DIMM position.
Supports the forwarding of southbound and northbound
frames, servicing requests directed to a specific AMB or
DIMM, as defined in the protocol chapter, and merging the
return data into the northbound frames.
If the AMB resides on the last DIMM in the channel, the
AMB initializes northbound frames.
Detects errors on the channel and reports them to the host
memory controller.
Support the FB-DIMM configuration register set as defined
in the register chapters.
Acts as DRAM memory buffer for all read, write, and
configuration accesses addressed to the DIMM.
Provides a read buffer FIFO and a write buffer FIFO.
Supports an SMBus protocol interface for access to the
AMB configuration registers.
Provides logic to support MEMBIST and IBIST Design for
Test functions.
Provides a register interface for the thermal sensor and
status indicator.
Functions as a repeater to extend the maximum length of
FB-DIMM Links.
Transparent Mode for DRAM Test Support
In this mode, the Advanced Memory Buffer will provide lower
speed tester access to DRAM pins through the FB-DIMM I/O
pins. This allows the tester to send an arbitrary test pattern to
the DRAMs. Transparent mode only supports a maximum
DRAM frequency equivalent to DDR2 400. Transparent mode
functionality:
Reconfigures FB-DIMM inputs from differential high speed
link receivers to two single ended lower speed receivers
(~200 MHz)
These inputs directly control DDR2 Command/Address
and input data that is replicated to all DRAMs
Uses low speed direct drive FB-DIMM outputs to bypass
high speed Parallel/Serial circuitry and provide test results
back to tester
DDR2 SDRAM Interface
Supports DDR2 at speeds of 533, 667MT/s
Supports 256Mb, 512Mb and 1Gb devices in x4 and x8
configurations
72-bit DDR2 SDRAM memory array
3.2
Interfaces
Figure 2
illustrates the Advanced Memory Buffer and all of its
interfaces. They consist of two FB-DIMM links, one DDR2
channel and an SMBus interface. Each FB-DIMM link
connects the Advanced Memory Buffer to a host memory
controller or an adjacent FB-DIMM. The DDR2 channel
supports direct connection to the DDR2 SDRAMs on a Fully
Buffered DIMM.
相關(guān)PDF資料
PDF描述
HYS72T64400HFD-3S-A 240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T128020HR-3S-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T128000HR-3S-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T128020HR-3.7-A 240-Pin Registered DDR2 SDRAM Modules
HYS72T128020HR-3-A 240-Pin Registered DDR2 SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T64400HFD-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T64400HFD-3S-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T64400HFN 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T64400HFN-3.7-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
HYS72T64400HFN-3S-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
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