參數(shù)資料
型號: HYS72T64400HFA-3.7-B
廠商: QIMONDA AG
元件分類: DRAM
英文描述: 240-Pin Fully-Buffered DDR2 SDRAM Modules
中文描述: 64M X 72 DDR DRAM MODULE, DMA240
封裝: GREEN, DIMM-240
文件頁數(shù): 10/47頁
文件大小: 1378K
代理商: HYS72T64400HFA-3.7-B
HYS72T[64/128/256]4[00/20]HFA–[2.5/3S/3.7]–B
Fully-Buffered DDR2 SDRAM Modules
Internet Data Sheet
Rev.1.01, 2007-06-20
10062006-RQWY-GI6S
10
TABLE 6
Abbreviations for Buffer Type
TABLE 7
Abbreviations for Pin Type
19,20,44,45,
86,87,105,1
06,139,
140,164,165
,206,207,22
5,226
136
16
RFU
NC
Not connected
Pins not connected on Infineon FB-DIMM’s. Pin positions are reserved for
future architecture flexibility.
VID0
VID1
Voltage ID
Note: These Pins must be unconnected for DDR2-based Fully Buffered
DIMMs VID[0] is V
DD
value: OPEN = 1.8 V, GND = 1.5 V; VID[1] is
V
CC
value: OPEN = 1.5 V, GND = 1.2 V
VREF
Note: Pin must be unconnected for normal operation
137
Test
AI
Abbreviation
Description
HSDL_15
LV-CMOS
CMOS
OD
High-Speed Differential Point-to-Point Link Interface at 1.5 V
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and allows multiple
devices to share as a wire-OR.
Abbreviation
Description
I
O
I/O
AI
PWR
GND
NU
NC
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable
Not Connected
Pin#
Nam
e
Pin
Type
Buffer
Type
Function
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