參數(shù)資料
型號(hào)： HYS72T128000HR-3-A
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Registered DDR2 SDRAM Modules
中文描述： 128M X 72 DDR DRAM MODULE, 0.45 ns, DMA240
封裝： GREEN, DIMM-240
文件頁(yè)數(shù)： 30/74頁(yè)
文件大小： 1554K
代理商： HYS72T128000HR-3-A
Internet Data Sheet
Rev. 1.31, 2006-11
03292006-21GC-MK06
30
HYS72T[64/128/256]xx0HR–[3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
3.4
I
DD
Specifications and Conditions
This chapter describes the I
DD
Specifications and Conditions.
Table 20 “IDD Measurement Conditions” on Page 30
Table 21 “Definitions for IDD” on Page 31
Table 22 “IDD Specification for HYS72T[64/128/256]xxxHR–3–A” on Page 32
Table 23 “IDD Specification for HYS2T[64/128/256]xxxHR–3S–A” on Page 33
Table 24 “IDD Specification for HYS72T[64/128/256]xxxHR–3.7–A” on Page 34
Table 25 “IDD Specification for HYS72T[64/128/256]xxxHR–5–A” on Page 35
TABLE 20
I
DD
Measurement Conditions
Note
1)2)3)4)5)6)7)8)
Parameter
Symbol
Operating Current 0
One bank Active - Precharge;
t
CK
=
t
CK.MIN
,
t
RC
=
t
RC.MIN
,
t
RAS
=
t
RAS.MIN
, CKE is HIGH, CS is
HIGH between valid commands. Address and control inputs are SWITCHING, Databus inputs
are SWITCHING.
Operating Current 1
One bank Active - Read - Precharge;
I
OUT
= 0 mA, BL = 4,
t
CK
=
t
CK.MIN
,
t
RC
=
t
RC.MIN
,
t
RAS
=
t
RAS.MIN
,
t
RCD
=
t
RCD.MIN
, AL = 0, CL = CL
.MIN
; CKE is HIGH, CS is HIGH between valid
commands. Address and control inputs are SWITCHING, Databus inputs are SWITCHING.
Precharge Standby Current
All banks idle; CS is HIGH; CKE is HIGH;
t
CK
=
t
CK.MIN
; Other control and address inputs are
SWITCHING, Data bus inputs are SWITCHING
Precharge Power-Down Current
Other control and address inputs are STABLE, Data bus inputs are FLOATING
.
Precharge Quiet Standby Current
All banks idle; CS is HIGH; CKE is HIGH;
t
CK
=
t
CK.MIN
; Other control and address inputs are
STABLE, Data bus inputs are FLOATING.
Active Power-Down Current
All banks open;
t
CK
=
t
CK.MIN
, CKE is LOW; Other control and address inputs are STABLE, Data
bus inputs are FLOATING. MRS A12 bit is set to LOW (Fast Power-down Exit);
Active Power-Down Current
All banks open;
t
CK
=
t
CK.MIN
, CKE is LOW; Other control and address inputs are STABLE, Data
bus inputs are FLOATING. MRS A12 bit is set to HIGH (Slow Power-down Exit);
Active Standby Current
Burst Read: All banks open; Continuous burst reads; BL = 4; AL = 0, CL = CL
MIN
;
t
CK
=
t
CK.MIN
;
t
RAS
=
t
RAS.MAX
,
t
RP
=
t
RP.MIN
; CKE is HIGH, CS is HIGH between valid commands. Address
inputs are SWITCHING; Data Bus inputs are SWITCHING;
I
OUT
= 0 mA.
Operating Current
Burst Read: All banks open; Continuous burst reads; BL = 4; AL = 0, CL = CL
MIN
;
t
CK
=
t
CK.MIN
;
t
RAS
=
t
RAS.MAX.
,
t
RP
=
t
RP.MIN
; CKE is HIGH, CS is HIGH between valid commands. Address
inputs are SWITCHING; Data Bus inputs are SWITCHING;
I
OUT
= 0 mA.
Operating Current
Burst Write: All banks open; Continuous burst writes; BL = 4; AL = 0, CL = CL
MIN
;
t
CK
=
t
CK.MIN
;
t
RAS
=
t
RAS.MAX.
,
t
RP
=
t
RP.MAX
; CKE is HIGH, CS is HIGH between valid commands. Address
inputs are SWITCHING; Data Bus inputs are SWITCHING;
I
DD0
I
DD1
I
DD2N
I
DD2P
I
DD2Q
I
DD3P(0)
I
DD3P(1)
I
DD3N
I
DD4R
I
DD4W
相關(guān)PDF資料
PDF描述
HYS72T128020HU-2.5-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020HU-25F-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020HU-3.7-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020HU-3-B 240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020HU-3S-B 240-Pin unbuffered DDR2 SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T128000HR-3S-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules
HYS72T128000HR-3S-B 功能描述:MODULE DDR2 1GB 240-DIMM RoHS:是 類別:存儲(chǔ)卡，模塊 >> 存儲(chǔ)器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM
HYS72T128000HR-5-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules
HYS72T128000HR-5-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR2 SDRAM Modules
HYS72T128001HR 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
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