參數(shù)資料
型號: HYS72T128000HP-3.7-A
廠商: QIMONDA AG
元件分類: DRAM
英文描述: 240-Pin Registered DDR2 SDRAM Modules
中文描述: 128M X 72 DDR DRAM MODULE, 0.5 ns, DMA240
封裝: GREEN, RDIMM-240
文件頁數(shù): 12/49頁
文件大?。?/td> 1434K
代理商: HYS72T128000HP-3.7-A
Internet Data Sheet
Rev. 1.02, 2007-07
03292006-08VU-L8WK
12
HYS72T[64/128/256]xx0HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
TABLE 6
Abbreviations for Buffer Type
2, 5, 8, 11, 14, 17,
20, 23, 26, 29, 32,
35, 38, 41, 44, 47,
50, 65, 66, 79, 82,
85, 88, 91, 94, 97,
100, 103, 106, 109,
112, 115, 118, 121,
124, 127, 130, 133,
136, 139, 142, 145,
148, 151, 154, 157,
160, 163, 166, 169,
198, 201, 204, 207,
210, 213, 216, 219,
222, 225, 228, 231,
234, 237
Other Pins
19, 102, 137, 138,
V
SS
GND
Ground Plane
Power and ground for the DDR SDRAM
NC
NC
Not connected
Pins not connected on Qimonda RDIMM’s
On-Die Termination Control 1:0
Asserts on-die termination for DQ, DM, DQS, and DQS signals if
enabled via the DDR2 SDRAM mode register.
Note: 2-Ranks module
195
77
ODT0
ODT1
I
I
SSTL
SSTL
NC
NC
Note: 1-Rank modules
Abbreviation
Description
SSTL
CMOS
OD
Serial Stub Terminated Logic (SSTL_18)
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate,
and allows multiple devices to share as a wire-OR.
Pin No.
Name
Pin
Type
Buffer
Type
Function
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