參數(shù)資料
型號: HYS72D64320
廠商: QIMONDA
英文描述: 184-Pin Registered Double Data Rate SDRAM Module
中文描述: 184針注冊雙倍數(shù)據(jù)速率SDRAM模塊
文件頁數(shù): 3/50頁
文件大?。?/td> 1158K
代理商: HYS72D64320
Internet Data Sheet
Rev. 1.32, 2007-03
03292006-Q22P-G7TH
3
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
Registered Double Data Rate SDRAM
1
Overview
This chapter gives an overview of the 184-pin Registered Double Data Rate DDR2 SDRAM Modules with parity bit product
family and describes its main characteristics.
1.1
Features
184-Pin Registered 8-Byte Dual-In-Line DDR SDRAM
Module for “1U” PC, Workstation and Server main memory
applications
One rank 32M
×
72 and 64M
×
72 and two ranks 64M
×
72
and 128M
×
72 organization
JEDEC standard Double Data Rate Synchronous DRAMs
(DDR SDRAM) with a single + 2.5 V (± 0.2 V) power
supply and + 2.6 V (
±
0.1 V) power supply for DDR400
Built with 256-Mbit DDR SDRAMs in P--TFBGA-60-1
packages
Programmable CAS Latency, Burst Length, and Wrap
Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_2 compatible
Re-drive for all input signals using register and PLL
devices.
Serial Presence Detect with E
2
PROM
Low Profile Modules form factor: 133.35 mm
×
28.58 mm
×
4.00 mm / 2.64 mm and for 1GB 133.35 mm
×
30.48 mm
(1.2”)
×
4.00 mm
JEDEC standard reference layout for one rank 256 MB,
512 MB and two ranks 512 MB, 1 GB: PC 2700 and
PC 3200 Registered DIMM Raw Cards A,B,C,D
Gold plated contacts
TABLE 1
Performance
1.2
Description
The
HYS72D[128/64/32]3xx[G/H]BR–[5/6/7]–C
and
HYS72D64320GBR–5–C
are low profile versions of the
standard Registered DIMM modules suitable for 1U Server
Applications. The Low Profile DIMM versions are available as
32M
×
72 (256 MB), 64M
×
72 (512 MB), 128M
×
72 (1 GB)
The memory array is designed with Double Data Rate
Synchronous DRAMs for ECC applications. All control and
address signals are re-driven on the DIMM using register
devices and a PLL for the clock distribution. This reduces
capacitive loading to the system bus, but adds one cycle to
the SDRAM timing. A variety of decoupling capacitors are
mounted on the PC board. The DIMMs feature serial
presence detect based on a serial E
2
PROM device using the
2-pin I
2
C protocol. The first 128 bytes are programmed with
configuration data and the second 128 bytes are available to
the customer.
Part Number Speed Code
-5
–6
-7
Unit
Speed Grade
Component
Module
@CL3
@CL2.5
@CL2
DDR400B
PC3200-3033
200
166
133
DDR333B
PC2700–2533
166
166
133
DDR266A
PC2100-2033
143
133
MHz
MHz
MHz
max. Clock
Frequency
f
CK3
f
CK2.5
f
CK2
相關(guān)PDF資料
PDF描述
HYS72D64320HBR-5-C 184-Pin Registered Double Data Rate SDRAM Module
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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