參數(shù)資料
型號(hào)： HYS72D64301HBR_07
廠商： QIMONDA
英文描述： 184-Pin Registered Double-Data-Rate SDRAM Module
中文描述： 184引腳錄得雙數(shù)據(jù)速率SDRAM模塊
文件頁(yè)數(shù)： 11/39頁(yè)
文件大?。?/td> 1223K
代理商： HYS72D64301HBR_07
Internet Data Sheet
Rev. 1.22, 2007-08
03292006-6N25-8R3I
11
HYS72D[64/128/256]xxxHBR–[5/6]–C
Registered Double-Data-Rate SDRAM Module
TABLE 8
Electrical Characteristics and DC Operating Conditions
Parameter
Symbol
Values
Unit
Note/Test Condition
1)
1) 0
°
C
≤
T
A
≤
70
°
C; V
DDQ
= 2.5 V
±
0.2 V, V
DD
= +2.5 V
±
0.2 V;
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions,
V
DDQ
must be less than or equal to
V
DD
.
4) Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF.DC
.
V
REF
is also expected to track noise variations in
V
DDQ
.
5) V
is not applied directly to the device.
V
TT
is a system supply for signal termination resistors, is expected to be set equal to
V
REF
, and
must track variations in the DC level of
V
REF
.
6) Inputs are not recognized as valid until
V
REF
stabilizes.
7)
V
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
8) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature and
voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
9) Values are shown per pin.
Min.
Typ.
Max.
Device Supply Voltage
Device Supply Voltage
Output Supply Voltage
Output Supply Voltage
EEPROM supply voltage
Supply Voltage, I/O Supply
Voltage
Input Reference Voltage
I/O Termination Voltage
(System)
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and
CK Inputs
Input Differential Voltage,
CK and CK Inputs
VI-Matching Pull-up Current
to Pull-down Current
Input Leakage Current
V
DD
V
DD
V
DDQ
V
DDQ
V
DDSPD
V
SS
,
V
SSQ
2.3
2.5
2.3
2.5
2.3
0
2.5
2.6
2.5
2.6
2.5
2.7
2.7
2.7
2.7
3.6
0
V
V
V
V
V
V
f
CK
≤
166 MHz
f
CK
> 166 MHz
2)
f
CK
≤
166 MHz
3)
f
CK
> 166 MHz
2)3)
—
—
V
REF
V
TT
0.49
×
V
DDQ
V
REF
– 0.04
0.5
×
V
DDQ
0.51
×
V
DDQ
V
REF
+ 0.04
V
V
4)
5)
V
IH(DC)
V
IL(DC)
V
IN(DC)
V
REF
+ 0.15
–
0.3
–
0.3
V
DDQ
+ 0.3
V
REF
– 0.15
V
DDQ
+ 0.3
V
V
V
6)
6)
6)
V
ID(DC)
0.36
V
DDQ
+ 0.6
V
6)7)
V
I
Ratio
0.71
1.4
—
8)
I
I
–2
2
μ
A
Any input 0 V
≤
V
IN
≤
V
DD
; All
other pins not under test = 0 V
9)
DQs are disabled; 0 V
≤
V
OUT
≤
V
DDQ
9)
V
OUT
=
1.95 V
Output Leakage Current
I
OZ
–5
5
μ
A
Output High Current, Normal
Strength Driver
Output Low Current, Normal
Strength Driver
I
OH
—
–16.2
mA
I
OL
16.2
—
mA
V
OUT
= 0.35 V
相關(guān)PDF資料
PDF描述
HYS72D64301HBR-5-C 184-Pin Registered Double-Data-Rate SDRAM Module
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HYS72D64301HBR-6-C 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double-Data-Rate SDRAM Module
HYS72D64320 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double Data Rate SDRAM Module
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