參數(shù)資料
型號: HYS72D32300GU-6-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Unbuffered Dual-In-Line Memory Modules
中文描述: 184引腳緩沖雙列內(nèi)存模組
文件頁數(shù): 34/42頁
文件大?。?/td> 976K
代理商: HYS72D32300GU-6-B
01
40
00
04
60
70
00
82
10
00
01
0E
04
0C
01
02
20
C1
75
70
00
00
HYS[64/72]D[16/32/64][300/301/320][G/H]U–[5/6]–C
Unbuffered DDR SDRAM Modules
SPD Contents
Data Sheet
34
Rev. 1.0, 2004-03
Table 21
SPD Codes for HYS[64/72]D[16/32/64][300/301/320]GU–6–C
P
H
128 MB
×
64
1 Rank
PC2700U–
25330
Rev 0.0
HEX
H
256 MB
×
64
1 Rank
PC2700U–
25330
Rev 0.0
HEX
80
08
07
0D
0A
01
40
00
04
60
70
00
82
08
00
01
0E
04
0C
01
02
20
C1
75
70
00
00
H
512 MB
×
64
2 Ranks
PC2700U–
25330
Rev 0.0
HEX
80
08
07
0D
0A
02
40
00
04
60
70
00
82
08
00
01
0E
04
0C
01
02
20
C1
75
70
00
00
H
512 MB
×
72
2 Ranks
PC2700U–
25331
Rev 1.0
HEX
80
08
07
0D
0A
02
48
00
04
60
70
02
82
08
08
01
0E
04
0C
01
02
20
C1
75
70
00
00
H
256 MB
×
72
1 Rank
PC2700U–
25330
Rev 0.0
HEX
80
08
07
0D
0A
01
48
00
04
60
70
02
82
08
08
01
0E
04
0C
01
02
20
C1
75
70
00
00
Label Code
Jedec SPD Revision
Description
Programmed SPD Bytes in E2PROM 80
Total number of Bytes in E2PROM
Memory Type (DDR = 07h)
Number of Row Addresses
Number of Column Addresses
Number of DIMM Ranks
Data Width (LSB)
Data Width (MSB)
Interface Voltage Levels
tCK @ CLmax (Byte 18) [ns]
tAC SDRAM @ CLmax (Byte 18)[ns]
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
tCCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
tCK @ CLmax -0.5 (Byte 18) [ns]
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
tAC SDRAM @ CLmax -1 [ns]
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
08
07
0D
09
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參數(shù)描述
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