參數(shù)資料
型號(hào): HYS72D32020GU-7-A
廠商: INFINEON TECHNOLOGIES AG
英文描述: Unbuffered DDR SDRAM-Modules
中文描述: 無(wú)緩沖DDR SDRAM內(nèi)存模塊
文件頁(yè)數(shù): 25/30頁(yè)
文件大?。?/td> 881K
代理商: HYS72D32020GU-7-A
non-ECC/ECC
Self-Refresh 15.6 ms
×
8
na/
×
8
HYS[64/72]D[16000/32020]GU-[7/8]-A
Unbuffered DDR SDRAM-Modules
SPD Contents
Data Sheet
25
Rev. 1.03, 2004-01
10292003-WLD7-IJ5Z
Table 12
Byte#
SPD Codes for PC2100 Modules -7
Description
128MB
x64
1rank
–7
hex.
80
08
07
0C
0A
128MB
x72
1rank
–7
hex.
80
08
07
0C
0A
128MB
x64
2ranks
–7
hex.
80
08
07
0C
0A
128MB
x64
2ranks
–7
hex.
80
08
07
0C
0A
0
1
2
3
4
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column
Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at
CL = 2.5
Access Time from Clock at
CL = 2.5
DIMM config
Refresh Rate/Type
SDRAM Width, Primary
Error Checking SDRAM Data
Witdh
Minimum Clock Delay for
Back-to-Back Random
Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module
Attributes
SDRAM Device Attributes:
General
Min. Clock Cycle Time at
CAS Latency = 2
Access Time from Clock for
CL = 2
Minimum Clock Cycle Time
for CL = 1.5
Access Time from Clock at
CL = 1.5
128
256
DDR-SDRAM
12
10
5
6
7
8
9
1/2
×
64/
×
72
0
SSTL_2.5
7 ns
01
40
00
04
70
01
48
00
04
70
02
40
00
04
70
02
48
00
04
70
10
0.75 ns
75
75
75
75
11
12
13
14
00
80
08
00
02
80
08
08
00
80
08
00
02
80
08
08
15
t
CCD
= 1 CLK
01
01
01
01
16
17
18
19
20
21
2, 4 & 8
4
CAS latency = 2 & 2.5 0C
CS latency = 0
Write latency = 1
unbuffered
0E
04
0E
04
0C
01
02
20
0E
04
0C
01
02
20
0E
04
0C
01
02
20
01
02
20
22
C0
C0
C0
C0
23
7.5 ns
75
75
75
75
24
0.75 ns
75
75
75
75
25
not supported
00
00
00
00
26
not supported
00
00
00
00
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