參數(shù)資料
型號(hào): HYS64V64220GU
廠商: INFINEON TECHNOLOGIES AG
英文描述: 3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules
中文描述: 3.3伏6400 x 64/72-Bit,512MByte SDRAM內(nèi)存模塊168針腳無(wú)緩沖DIMM模塊
文件頁(yè)數(shù): 8/13頁(yè)
文件大?。?/td> 456K
代理商: HYS64V64220GU
144 pin SO-DIMM SDRAM Modules
HYS64V64220GBDL-7/7.5/8-D
Infineon Technologies
8
2002-08-06
Row Active Time
t
RAS
t
RC
t
RFC
37
100k
45
100k
48
100k
ns
5
Row Cycle Time
60
67
70
ns
5
Row Cycle Time during Auto
Refresh
63
67
70
ns
Activate(a) to Activate(b)
Command period
t
RRD
14
15
16
ns
5
CAS(a) to CAS(b) Command
period
t
CCD
1
1
1
CLK
Refresh Cycle
Refresh Period (8192 cycles)
t
REF
t
SREX
64
64
64
ms
Self Refresh Exit Time
1
1
1
CLK
Read Cycle
Data Out Hold Time
t
OH
3
3
3
ns
2,
6
Data Out to Low Impedance Time
t
LZ
t
HZ
t
DQZ
0
0
0
ns
Data Out to High Impedance Time
3
7
3
7
3
8
ns
DQM Data Out Disable Latency
2
2
2
CLK
Write Cycle
Last Data Input to Precharge
(Write without AutoPrecharge)
t
WR
14
15
15
ns
7
Last Data Input to Activate
(Write with AutoPrecharge)
t
DAL,min
CLK
8
DQM Write Mask Latency
t
DQW
0
0
0
CLK
AC Characteristics
9)10)
T
A
= 0 to 70
o
C; V
SS
= 0 V; V
DD
, V
= 3.3 V ± 0.3 V, tT = 1 ns
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
DD
= 3.3 V
±
0.3 V,
t
T
= 1 ns
Parameter
Symbol
Limit Values
Unit
-7
PC133-
222
-7.5
PC133-
333
-8
PC100-
222
min.
max.
min.
max.
min.
max.
相關(guān)PDF資料
PDF描述
HYS64V64220GBDL-7.5-D ?512MB PC133 (2-2-2) 2-bank. FBGA based. available 3Q02?
HYS64V64220GU-7.5-D SDRAM|64MX64|CMOS|DIMM|168PIN|PLASTIC
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HYS64V64220GU-75-D 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules