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參數(shù)資料
| 型號(hào)： | HYS64V32220GU-8B |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules |
| 中文描述： | 32M X 64 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 263K |
| 代理商： | HYS64V32220GU-8B |
HYS64V16200GDL/HYS64V32220GDL
144 pin SO-DIMM SDRAM Modules
INFINEON Technologies
11
9.01
SPD-Table HYS64V16200GDL:
Byte#
Description
SPD Entry Value
Hex
16Mx64
-7.5
80
08
04
0D
09
01
40
00
01
75
54
16Mx64
-7
16Mx64
-8
0
1
2
3
4
5
6
7
8
9
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont
’
d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access time from Clock at CL=3
128
256
SDRAM
13
9
1
64
0
LVTTL
7.5 / 10.0 ns
5.4 / 6.0 ns
75
54
A0
60
10
11
12
13
14
15
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM data width
Minimum clock delay for back-to-back random
column address
Burst Length supported
Number of SDRAM banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM module attributes
SDRAM Device Attributes :General
SDRAM Cycle Time at CL = 2
SDRAM Access Time from Clock at CL=2
SDRAM Cycle Time at CL = 1
SDRAM Access Time from Clock at CL=1
Minimum Row Precharge Time
Minimum Row Active to Row Active delay
Minimum RAS to CAS delay
Minimum Ras pulse width
Module Bank Density (per bank)
SDRAM input setup time
SDRAM input hold time
SDRAM data input setup time
SDRAM data input hold time
Superset information
SPD Revision
Checksum for bytes 0 - 62
64-125 Manufactures
’
s information
126
Frequency Specification
127
Details
128+
Unused storage locations
none
00
82
10
00
01
Self-Refresh, 7.8
μ
s
x16
n/a
t
ccd
= 1 CLK
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
1, 2, 4 & 8
2
2, & 3
CS latency = 0
Write latency = 0
unbuffered
Vcc tol +/- 10%
7.5 / 10 ns
5.4 / 6.0 ns
not supported
not supported
20 ns
15 / 16 ns
20 ns
42 / 45 / 60 ns
128MB
1.5 / 2 ns
0.8 / 1 ns
1.5 / 2 ns
0.8 / 1 ns
0F
04
06
01
01
00
0E
75
54
00
00
0F
0E
0F
2A
A0
60
FF
FF
14
0F
10
14
2D
20
15
08
15
08
32
15
08
15
08
00
20
10
20
10
36-61
62
63
FF
Revision 1.2
12
39
F4
9C
64
87
FF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS64V32300GU-7.5-D | SDRAM|32MX64|CMOS|DIMM|168PIN|PLASTIC |
| HYS64V32300GU | 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
| HYS64V32300GU-75-C2 | 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
| HYS64V32300GU-75-D | 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
| HYS64V32300GU-7-D | 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V32220GU-8-C2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules |
| HYS64V32220GUL-6-A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MEMORY SPECTRUM |
| HYS64V32300GU | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
| HYS64V32300GU-7.5-C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYS64V32300GU-7.5-D | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:SDRAM|32MX64|CMOS|DIMM|168PIN|PLASTIC |
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