參數(shù)資料
型號(hào)： HYS64D128320GU-6-B
廠商： INFINEON TECHNOLOGIES AG
英文描述： Network Cable Assembly; Connector Type A:T568A/B Modular Plug; Connector Type B:T568A/B Modular Plug; Cable Length:7ft; Approval Categories:Augmented Category 6 standards; cord color per TIA/EIA-606 standard RoHS Compliant: Yes
中文描述： 184引腳緩沖雙列內(nèi)存模組
文件頁數(shù)： 12/18頁
文件大小： 302K
代理商： HYS64D128320GU-6-B
HYS64/72D64000/128x20GU-7/8-A
Unbuffered DDR-I SDRAM-Modules
INFINEON Technologies
12
2002-09-10 (rev.0.81)
Operating, Standby and Refresh Currents (PC2100 and PC2700)
Notes
4
IDD2P
mA
2
IDD2F
mA
2
IDD2Q
mA
2
IDD3P
mA
2
IDD5
mA
1
448
3040
3420
MA
X
MA
X
MA
X
MA
X
1360
1440
112
400
144
560
1560
1600
IDD7
IDD6
Operating Current
: four bank
;
four bank interleaving with BL=4
;
Refer to the following page for detailed test conditions.
3040
40
Self-Refresh Current
: CKE
<
= 0.2V
;
external clock on
;
tCK = tCK MIN
Auto-Refresh Current
: tRC = tRFC MIN, distributed refresh
2480
1, 3
4050
3420
45
80
90
mA
3600
mA
Symbol
Unit
Parameter/Condition
IDD4W
IDD4R
IDD3N
224
2160
2120
2385
2430
324
504
252
2250
2160
mA
126
1620
1530
1920
2000
224
2200
2475
2320
2610
Precharge Quiet Standby Current
: /CS
>
= VIH MIN, all banks idle
;
CKE
>
= VIH MIN
;
tCK = tCK MIN ,address and other control inputs
stable at
>
= VIH MIN or
<
= VIL MA
X;
VIN = VREFfor DQ, DQS and DM.
IDD0
Operating Current
: one bank
;
active/read/precharge
;
Burst = 4
;
Refer to the following page for detailed test conditions.
Operating Current
: one bank
;
active / precharge
;
tRC = tRC MIN
;
tCK =
tCK MIN
;
DQ, DM, and DQS inputs changing once per clock cycle
;
address and control inputs changing once every two clock cycles
IDD1
Active Power-Down Standby Current
: one bank active
;
power-down
mode
;
CKE
<
= VIL MA
X;
tCK = tCK MIN
;
VIN = VREF for DQ, DQS and
DM.
Active Standby Current
: one bank active
;
active / precharge
;
CS
>
= VIH
MIN
;
CKE
>
= VIH MIN
;
tRC = tRAS MA
X;
tCK = tCK MIN
;
DQ, DM, and
DQS inputs changing twice per clock cycle
;
address and control inputs
changing once per clock cycle
Operating Current
: one bank active
;
Burst = 2
;
reads
;
continuous burst
;
address and control inputs changing once per clock cycle
;
50% of data
outputs changing on every clock edge
;
CL = 2 for DDR200, and
DDR266A, CL=3 for DDR333
;
tCK = tCK MIN
;
IOUT = 0mA
Operating Current
: one bank active
;
Burst = 2
;
writes
;
continuous burst
;
address and control inputs changing once per clock cycle
;
50% of data
outputs changing on every clock edge
;
CL = 2 for DDR200, and
DDR266A, CL=3 for DDR333
;
tCK = tCK MIN
2790
1755
1800
630
1, 3
2
mA
1
450
mA
1, 3
1260
mA
288
1120
800
900
252
1. The module IDD values are calculated from the component IDD datasheet values as:
n * IDDx[component]
for single bank modules (n: number of components per module bank)
n * IDDx[component] + n * IDD3N[component]
2. The module IDD values are calculated from the component IDD datasheet values as:
n * IDDx[component]
for single bank modules (n: number of components per module bank)
2 * n * IDDx[component]
for two bank modules (n: number of components per module bank)
3. DQ I/O (IDDQ) currents are not included into calculations: module IDD values will be measured differently depending on load conditions
4. Test condition for maximum values: VDD = 2.7V ,Ta = 10°C
for two bank modules (n: number of components per module bank)
mA
1
512MB
x64
1bank
-7
512MB
x72
1bank
-7
1GB
x64
2bank
-7
1GB
x72
2bank
-7
Precharge Power-Down Standby Current
: all banks idle
;
power-down
mode
;
CKE
<
= VIL MA
X;
tCK = tCK MIN
Precharge FloatingStandby Current
: /CS
>
= VIH MIN, all banks idle
;
CKE
>
= VIH MIN
;
tCK = tCK MIN ,address and other control inputs
changing once per clock cycle, VIN = VREF for DQ, DQS and DM.
162
1GB
x64
2bank
-6
MA
X
1GB
x72
2bank
-6
MA
X
288
324
960
1080
640
720
368
414
1200
1350
2560
2880
2480
2790
3280
3690
80
90
3840
4320
相關(guān)PDF資料
PDF描述
HYS64D64000GU-8-A 2.5 V 184-pin Unbuffered DDR-I SDRAM Modules
HYS72D64000GU-8-A 2.5 V 184-pin Unbuffered DDR-I SDRAM Modules
HYS72D128321GBR-5-B Connector Wall Plate; Color:Electric White; Leaded Process Compatible:Yes; Series:PS6; No. of Ports:2 RoHS Compliant: Yes
HYS72D128300GBR Connector Wall Plate; Color:White; Leaded Process Compatible:Yes; No. of Ports:6 RoHS Compliant: Yes
HYS72D128300GBR-5-B Category 6 Termination Kit; Contents Of Kit:GigaBIX? mount, color-coded GigaBIX? connectors, wire guards, designation strips and labels, Velcro tie and installation guide RoHS Compliant: Yes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS64D128320HU-5-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:42184-Pin Unbuffered Double-Data-Rate Memory Modules
HYS64D128320HU-5-C 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Unbuffered Double Data Rate SDRAM
HYS64D128320HU-6-B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules
HYS64D128320HU-6-C 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Unbuffered Double Data Rate SDRAM
HYS64D16000 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:200-Pin Small Outline Dual-In-Line Memory Modules
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