參數(shù)資料
型號: HYS 72V16300GR-7.5
廠商: SIEMENS AG
英文描述: 3.3V 128MB SDRAM Module(3.3V 128M位 SDRAM 模塊)
中文描述: 3.3 128MB的內(nèi)存模塊(3.3V的128兆位內(nèi)存模塊)
文件頁數(shù): 9/19頁
文件大小: 228K
代理商: HYS 72V16300GR-7.5
HYS 72Vxx3xxGR-7.5
PC133 Registered SDRAM-Modules
Data Book
9
1.00
Operating Currents per SDRAM Component
T
A
= 0 to 70
°
C
1)
,
V
DD
= 3.3 V
±
0.3 V
(Recommended Operating Conditions unless otherwise noted)
Parameter
Test Condition Symbol 64 Mb 128
Mb
256 M
b
Unit Note
max.
Operating current
t
RC
=
t
RC(MIN.)
,
t
CK
=
t
CK(MIN.)
Outputs open, Burst Length = 4,
CL = 3
All banks operated in random
access,
all banks operated in ping-pong
manner to maximize gapless
data access
I
CC1
x4 100
120
270
mA
2)
Precharge stand-by current
in Power Down Mode
CS =
V
IH(MIN.)
, CKE
V
IL(MAX.)
Precharge Stand-by Current
in Non-Power Down Mode
t
CK
= min.
I
CC2P
2
2
2
mA
2)
CS =
V
IH (MIN.)
, CKE
V
IH(MIN.)
No operating current
t
CK
= min.
I
CC2N
35
40
35
mA
2)
t
CK
= min., CS =
V
IH(MIN.)
,
active state (max. 4 banks)
CKE
V
IH(MIN.)
CKE
V
IL(MAX.)
I
CC3N
I
CC3P
45
50
50
mA
2)
8
10
10
mA
2)
Burst operating current
t
CK
= min.,
Read command cycling
I
CC4
x4 60
120
270
mA
2), 3)
Auto refresh current
t
CK
= min.,
Auto Refresh command cycling
I
CC5
130
180
240
mA
2)
Self refresh current
Self Refresh Mode,
CKE = 0.2 V
I
CC6
1
1.5
2.5
mA
2)
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