參數(shù)資料
型號(hào): HYB39S16320TQ-8
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 128 x 64 pixel format, LED Backlight available
中文描述: 512K X 32 SYNCHRONOUS GRAPHICS RAM, 6 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 21/70頁
文件大?。?/td> 563K
代理商: HYB39S16320TQ-8
HYB 39S16320TQ-6/-7/-8
Semiconductor Group
21
1998-10-01
The table shows the masking of data caused by the registered value on the DQ pins, when data is
transfered from Color Register to the 8 succeeding memory locations addressed in the Write Block
command.
When a “1” is registered, the Color Register data will be written to the corresponding DRAM cells,
subject to the DQM and the WPB masking. The overall Block Write mask consists of a combination
of the DQM signals, the WPB mask register and the column/byte mask information.
Block Write Timing Considerations
A Block Write access requires a time period of
t
BWC
to execute, so in general, the cycle after the
Block Write command should be a NOP. However, Active or Precharge commands to the other
bank are allowed. When following a Block Write with a Precharge command to the same bank,
t
BPL
must be met.
Bit Mask mapping of DQ bits
Address
within Written
Block
Byte within Data Word
Byte 3
Byte 2
Byte 1
Byte 0
0
DQ24
DQ16
DQ8
DQ0
1
DQ25
DQ17
DQ9
DQ1
2
DQ26
DQ18
DQ10
DQ2
3
DQ27
DQ19
DQ11
DQ3
4
DQ28
DQ20
DQ12
DQ4
5
DQ29
DQ21
DQ13
DQ5
6
DQ30
DQ22
DQ14
DQ6
7
DQ31
DQ23
DQ15
DQ7
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