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| 型號： | HYB18H256321BF |
| 廠商： | QIMONDA |
| 英文描述： | 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| 中文描述： | 256兆GDDR3顯卡內(nèi)存GDDR3顯卡內(nèi)存 |
| 文件頁數(shù)： | 9/41頁 |
| 文件大?。?/td> | 1302K |
| 代理商： | HYB18H256321BF |
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HYB18H256321BF
256-Mbit GDDR3
Internet Data Sheet
Rev. 0.80, 2007-09
09132007-07EM-7OYI
9
2.3
Truth Tables
2.3.1
Function Truth Table for more than one Activated Bank
If there is more than one bank activated in the Graphics SDRAM, some commands can be performed in parallel due to the
chip’s multibank architecture. The following table defines for which commands such a scheme is possible. All other transitions
are illegal. Notes 1-11 define the start and end of the actions belonging to a submitted command. This table is based on the
assumption that there are no other actions ongoing on bank n or bank m. If there are any actions ongoing on a third bank
t
RRD
,
t
RTW
and
t
WTR
have to be taken always into account.
TABLE 4
Function Truth Table I
Current State
Ongoing action on bank n
Possible action in parallel on bank m
ACTIVE
ACTIVATE
1)
WRITE
3)
WRITE/A
5)
READ
7)
READ/A
9)
PRECHARGE
10)
PRECHARGE ALL
10)
POWER DOWN ENTRY
12)
ACTIVATE 1)
POWER DOWN ENTRY
12)
AUTO REFRESH
13)
SELF REFRESH ENTRY
12)
MODE REGISTER SET (MRS)
14)
EXTENDED MRS
14)
POWER DOWN EXIT
15)
SELF REFRESH EXIT
16)
1) Action ACTIVATE starts with issuing the command and ends after
t
RCD
.
2) During action ACTIVATE an ACT command on another bank is allowed considering
t
RRD
, a PRE command on another bank is allowed
any time. WR, WR/A, RD and RD/A are always allowed.
3) Action WRITE starts with issuing the command and ends tWR after the first pos. edge of CLK following the last falling WDQS edge.
4) During action WRITE an ACT or a PRE command on another bank is allowed any time. A new WR or WR/A command on another bank
must be separated by at least one NOP from the ongoing WRITE. RD or RD/A are not allowed before t
WTR
is met.
5) Action WRITE/A starts with issuing the command and ends tWR after the first positive edge of CLK following the last falling WDQS edge.
6) During action WRITE/A an ACT or a PRE command on another bank is allowed any time. A new WR or WR/A command on another bank
has to be separated by at least one NOP from the ongoing command. RD is not allowed before or
t
WTR
is met. RD/A is not allowed during
an ongoing WRITE/A action.
7) Action READ starts with issuing the command and ends with the first positive edge of CLK following the last falling edge of RDQS.
8) During action READ and READ/A an ACT or a PRE command on another bank is allowed any time. A new RD or RD/A command on
another bank has to be separated by at least one NOP from the ongoing command. A WR or WR/A command on another bank has to
meet
t
RTW
.
9) Action READ/A starts with issuing the command and ends with the first positive edge of CLK following the last falling edge of RDQS.
10) Action PRECHARGE and PRECHARGE ALL start with issuing the command and ends after
t
RP
.
ACT, PRE, WRITE, WRITE/A, READ, READ/A
2)
ACT, PRE, WRITE, WRITE/A, READ, READ/A
4)
ACT, PRE, WRITE, WRITE/A, READ
6)
ACT, PRE, WRITE, WRITE/A, READ, READ/A
8)
ACT, PRE, WRITE, WRITE/A, READ, READ/A
8)
ACT, PRE, WRITE, WRITE/A, READ, READ/A
11)
-
-
ACT
-
-
-
-
-
-
-
IDLE
POWER DOWN
SELF REFRESH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB18H256321BF-10 | 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-11 | 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-12 | 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-14 | 256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H512321BF | 512-Mbit GDDR3 Graphics RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18H256321BF-10 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-11 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-11/12/14 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-12 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
| HYB18H256321BF-14 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:256-Mbit GDDR3 Graphics RAM GDDR3 Graphics RAM |
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